| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1019 FMINNUM_IEEE, enumerator
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| H A D | TargetLowering.h | 2906 case ISD::FMINNUM_IEEE: in isCommutativeBinOp()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 200 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; in getOperationName()
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| H A D | LegalizeVectorOps.cpp | 396 case ISD::FMINNUM_IEEE: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 149 case ISD::FMINNUM_IEEE: in ScalarizeVectorResult()
1248 case ISD::FMINNUM_IEEE: in SplitVectorResult()
4382 case ISD::FMINNUM_IEEE: in WidenVectorResult()
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| H A D | LegalizeFloatTypes.cpp | 2633 case ISD::FMINNUM_IEEE: in PromoteFloatResult()
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| H A D | DAGCombiner.cpp | 6111 ? ISD::FMINNUM_IEEE in getMinMaxOpcodeForFP()
6137 ? ISD::FMINNUM_IEEE in getMinMaxOpcodeForFP()
6193 TLI.isOperationLegal(ISD::FMINNUM_IEEE, OpVT); in foldAndOrOfSETCC()
11252 unsigned IEEEOpcode = (LHS == True) ? ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in combineMinNumMaxNumImpl()
11267 unsigned IEEEOpcode = (LHS == True) ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE; in combineMinNumMaxNumImpl()
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| H A D | TargetLowering.cpp | 8421 ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in expandFMINNUM_FMAXNUM()
8484 unsigned CompOpcIeee = IsMax ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE; in expandFMINIMUM_FMAXIMUM()
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| H A D | SelectionDAG.cpp | 5467 case ISD::FMINNUM_IEEE: in isKnownNeverNaN()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 525 setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, in SITargetLowering()
753 setOperationAction({ISD::FMAXNUM_IEEE, ISD::FMINNUM_IEEE}, MVT::f16, Legal); in SITargetLowering()
755 setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, in SITargetLowering()
779 setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FMINNUM_IEEE, in SITargetLowering()
901 ISD::FMINNUM_IEEE, in SITargetLowering()
5854 case ISD::FMINNUM_IEEE: in LowerOperation()
12690 case ISD::FMINNUM_IEEE: in isCanonicalized()
13033 case ISD::FMINNUM_IEEE: in minMaxOpcToMin3Max3Opc()
13154 case ISD::FMINNUM_IEEE: in supportsMin3Max3()
13239 (Opc == ISD::FMINNUM_IEEE && Op0.getOpcode() == ISD::FMAXNUM_IEEE) || in performMinMaxCombine()
[all …]
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| H A D | AMDGPUISelLowering.cpp | 654 case ISD::FMINNUM_IEEE: in fnegFoldsIntoOpcode()
4708 return ISD::FMINNUM_IEEE; in inverseMinMax()
4709 case ISD::FMINNUM_IEEE: in inverseMinMax()
4837 case ISD::FMINNUM_IEEE: in performFNegCombine()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | GenericOpcodes.td | 818 // FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or
844 // as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
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| H A D | TargetSelectionDAG.td | 513 def fminnum_ieee : SDNode<"ISD::FMINNUM_IEEE", SDTFPBinOp,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 714 ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE, in initActions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 365 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in MipsTargetLowering()
369 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in MipsTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 173 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in LoongArchTargetLowering()
212 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in LoongArchTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 771 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in PPCTargetLowering()
772 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in PPCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 44956 case ISD::FMINNUM_IEEE: in scalarizeExtEltFP()
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