| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXSubtarget.cpp | 97 case ISD::FMINNUM_IEEE: in hasNativeBF16Support()
|
| H A D | NVPTXISelLowering.cpp | 546 case ISD::FMINNUM_IEEE: in NVPTXTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1075 FMINNUM_IEEE, enumerator
|
| H A D | BasicTTIImpl.h | 2887 IID == Intrinsic::maximumnum ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE; in getTypeBasedIntrinsicInstrCost()
|
| H A D | TargetLowering.h | 2990 case ISD::FMINNUM_IEEE: in isCommutativeBinOp()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 210 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; in getOperationName()
|
| H A D | LegalizeVectorOps.cpp | 407 case ISD::FMINNUM_IEEE: in LegalizeOp()
|
| H A D | LegalizeVectorTypes.cpp | 156 case ISD::FMINNUM_IEEE: in ScalarizeVectorResult()
1304 case ISD::FMINNUM_IEEE: in SplitVectorResult()
4748 case ISD::FMINNUM_IEEE: in WidenVectorResult()
|
| H A D | TargetLowering.cpp | 8656 Node->getOpcode() == ISD::FMINNUM ? ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in expandFMINNUM_FMAXNUM()
8717 unsigned CompOpcIeee = IsMax ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE; in expandFMINIMUM_FMAXIMUM()
8780 Opc == ISD::FMINIMUMNUM ? ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in expandFMINIMUMNUM_FMAXIMUMNUM()
|
| H A D | LegalizeFloatTypes.cpp | 2872 case ISD::FMINNUM_IEEE: in PromoteFloatResult()
|
| H A D | DAGCombiner.cpp | 6490 ? ISD::FMINNUM_IEEE in getMinMaxOpcodeForFP()
6516 ? ISD::FMINNUM_IEEE in getMinMaxOpcodeForFP()
6572 TLI.isOperationLegal(ISD::FMINNUM_IEEE, OpVT); in foldAndOrOfSETCC()
11722 unsigned IEEEOpcode = (LHS == True) ? ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in combineMinNumMaxNumImpl()
11737 unsigned IEEEOpcode = (LHS == True) ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE; in combineMinNumMaxNumImpl()
|
| H A D | SelectionDAG.cpp | 5807 case ISD::FMINNUM_IEEE: in isKnownNeverNaN()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 541 setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, in SITargetLowering()
778 setOperationAction({ISD::FMAXNUM_IEEE, ISD::FMINNUM_IEEE}, MVT::f16, Legal); in SITargetLowering()
780 setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE, ISD::FMINIMUMNUM, in SITargetLowering()
805 setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FMINNUM_IEEE, in SITargetLowering()
959 ISD::FMINNUM_IEEE, in SITargetLowering()
6201 case ISD::FMINNUM_IEEE: in LowerOperation()
13454 case ISD::FMINNUM_IEEE: in isCanonicalized()
13806 case ISD::FMINNUM_IEEE: in minMaxOpcToMin3Max3Opc()
13951 case ISD::FMINNUM_IEEE: in supportsMin3Max3()
14036 (Opc == ISD::FMINNUM_IEEE && Op0.getOpcode() == ISD::FMAXNUM_IEEE) || in performMinMaxCombine()
[all …]
|
| H A D | AMDGPUISelLowering.cpp | 667 case ISD::FMINNUM_IEEE: in fnegFoldsIntoOpcode()
4936 return ISD::FMINNUM_IEEE; in inverseMinMax()
4937 case ISD::FMINNUM_IEEE: in inverseMinMax()
5069 case ISD::FMINNUM_IEEE: in performFNegCombine()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | GenericOpcodes.td | 867 // FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or
893 // as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
|
| H A D | TargetSelectionDAG.td | 539 def fminnum_ieee : SDNode<"ISD::FMINNUM_IEEE", SDTFPBinOp,
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 794 ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE, in initActions()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 366 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in MipsTargetLowering()
370 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in MipsTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 194 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in LoongArchTargetLowering()
243 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in LoongArchTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 907 ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE, in AArch64TargetLowering()
1246 ISD::FMAXNUM_IEEE, ISD::FMINNUM_IEEE, in AArch64TargetLowering()
1404 ISD::FROUND, ISD::FROUNDEVEN, ISD::FMAXNUM_IEEE, ISD::FMINNUM_IEEE, in AArch64TargetLowering()
2083 ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE, ISD::STRICT_FMINIMUM, in addTypeForNEON()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 778 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in PPCTargetLowering()
779 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in PPCTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 46795 case ISD::FMINNUM_IEEE: in scalarizeExtEltFP()
|