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Searched refs:FMAXIMUM (Results 1 – 25 of 27) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DConstrainedOps.def91 DAG_FUNCTION(maximum, 2, 0, experimental_constrained_maximum, FMAXIMUM)
H A DVPIntrinsics.def427 VP_PROPERTY_FUNCTIONAL_SDOPC(FMAXIMUM)
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1026 FMAXIMUM, enumerator
H A DBasicTTIImpl.h2034 ISD = ISD::FMAXIMUM; in getTypeBasedIntrinsicInstrCost()
H A DTargetLowering.h2909 case ISD::FMAXIMUM: in isCommutativeBinOp()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp204 case ISD::FMAXIMUM: return "fmaximum"; in getOperationName()
H A DLegalizeVectorOps.cpp399 case ISD::FMAXIMUM: in LegalizeOp()
1016 case ISD::FMAXIMUM: in Expand()
H A DLegalizeFloatTypes.cpp2628 case ISD::FMAXIMUM: in PromoteFloatResult()
3070 case ISD::FMAXIMUM: in SoftPromoteHalfResult()
H A DSelectionDAG.cpp474 return ISD::FMAXIMUM; in getVecReduceBaseOpcode()
5479 case ISD::FMAXIMUM: { in isKnownNeverNaN()
6799 case ISD::FMAXIMUM: in foldConstantFPMath()
13189 case ISD::FMAXIMUM: { in getNeutralElement()
13194 if (Opcode == ISD::FMAXIMUM) in getNeutralElement()
H A DLegalizeVectorTypes.cpp152 case ISD::FMAXIMUM: in ScalarizeVectorResult()
1255 case ISD::FMAXIMUM: in SplitVectorResult()
4389 case ISD::FMAXIMUM: in WidenVectorResult()
H A DLegalizeDAG.cpp3639 case ISD::FMAXIMUM: { in ExpandNode()
5437 case ISD::FMAXIMUM: in PromoteNode()
H A DTargetLowering.cpp8458 Node->getOpcode() == ISD::FMINNUM ? ISD::FMINIMUM : ISD::FMAXIMUM; in expandFMINNUM_FMAXNUM()
8478 bool IsMax = Opc == ISD::FMAXIMUM; in expandFMINIMUM_FMAXIMUM()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DGenericOpcodes.td843 // FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0
845 // semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2019 semantics.
H A DTargetSelectionDAG.td519 def fmaximum : SDNode<"ISD::FMAXIMUM" , SDTFPBinOp,
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp141 setOperationAction(ISD::FMAXIMUM, T, Legal); in WebAssemblyTargetLowering()
151 setOperationAction(ISD::FMAXIMUM, MVT::v8f16, Legal); in WebAssemblyTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp211 ISD::FMINIMUM, ISD::FMAXIMUM, ISD::FSQRT, ISD::FCBRT, in SITargetLowering()
853 setOperationAction({ISD::FMAXIMUM, ISD::FMINIMUM}, in SITargetLowering()
855 setOperationAction({ISD::FMINIMUM, ISD::FMAXIMUM}, in SITargetLowering()
904 ISD::FMAXIMUM, in SITargetLowering()
5857 case ISD::FMAXIMUM: in LowerOperation()
12693 case ISD::FMAXIMUM: in isCanonicalized()
13026 case ISD::FMAXIMUM: in minMaxOpcToMin3Max3Opc()
13160 case ISD::FMAXIMUM: in supportsMin3Max3()
13419 case ISD::FMAXIMUM: in performExtractVectorEltCombine()
14699 case ISD::FMAXIMUM: in PerformDAGCombine()
H A DAMDGPUISelLowering.cpp657 case ISD::FMAXIMUM: in fnegFoldsIntoOpcode()
4711 case ISD::FMAXIMUM: in inverseMinMax()
4714 return ISD::FMAXIMUM; in inverseMinMax()
4839 case ISD::FMAXIMUM: in performFNegCombine()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp715 ISD::FMINIMUM, ISD::FMAXIMUM, in initActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp627 setOperationAction(ISD::FMAXIMUM, MVT::f64, Legal); in SystemZTargetLowering()
632 setOperationAction(ISD::FMAXIMUM, MVT::v2f64, Legal); in SystemZTargetLowering()
637 setOperationAction(ISD::FMAXIMUM, MVT::f32, Legal); in SystemZTargetLowering()
642 setOperationAction(ISD::FMAXIMUM, MVT::v4f32, Legal); in SystemZTargetLowering()
647 setOperationAction(ISD::FMAXIMUM, MVT::f128, Legal); in SystemZTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp523 setOperationAction({ISD::FMAXIMUM, ISD::FMINIMUM}, MVT::f16, in RISCVTargetLowering()
549 setOperationAction({ISD::FMAXIMUM, ISD::FMINIMUM}, MVT::f32, Legal); in RISCVTargetLowering()
551 setOperationAction({ISD::FMAXIMUM, ISD::FMINIMUM}, MVT::f32, Custom); in RISCVTargetLowering()
567 setOperationAction({ISD::FMAXIMUM, ISD::FMINIMUM}, MVT::f64, Legal); in RISCVTargetLowering()
572 setOperationAction({ISD::FMAXIMUM, ISD::FMINIMUM}, MVT::f64, Custom); in RISCVTargetLowering()
951 ISD::FNEARBYINT, ISD::IS_FPCLASS, ISD::SETCC, ISD::FMAXIMUM, in RISCVTargetLowering()
983 setOperationAction({ISD::FMAXIMUM, ISD::FMINIMUM}, VT, Custom); in RISCVTargetLowering()
1371 ISD::IS_FPCLASS, ISD::FMAXIMUM, ISD::FMINIMUM}, in RISCVTargetLowering()
5889 Op.getOpcode() == ISD::FMAXIMUM ? RISCVISD::FMAX : RISCVISD::FMIN; in lowerFMAXIMUM_FMINIMUM()
5934 Op.getOpcode() == ISD::FMAXIMUM || O in lowerFMAXIMUM_FMINIMUM()
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp1562 setOperationAction(ISD::FMAXIMUM, MVT::f32, Legal); in ARMTargetLowering()
1564 setOperationAction(ISD::FMAXIMUM, MVT::f16, Legal); in ARMTargetLowering()
1566 setOperationAction(ISD::FMAXIMUM, MVT::v2f32, Legal); in ARMTargetLowering()
1568 setOperationAction(ISD::FMAXIMUM, MVT::v4f32, Legal); in ARMTargetLowering()
1577 setOperationAction(ISD::FMAXIMUM, MVT::v4f16, Legal); in ARMTargetLowering()
1579 setOperationAction(ISD::FMAXIMUM, MVT::v8f16, Legal); in ARMTargetLowering()
4240 ? ISD::FMINIMUM : ISD::FMAXIMUM; in LowerINTRINSIC_WO_CHAIN()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp776 ISD::FMAXIMUM, in AArch64TargetLowering()
867 ISD::FMINIMUM, ISD::FMAXIMUM, ISD::LROUND, in AArch64TargetLowering()
1195 ISD::FMAXNUM, ISD::FMINIMUM, ISD::FMAXIMUM, in AArch64TargetLowering()
1593 setOperationAction(ISD::FMAXIMUM, VT, Custom); in AArch64TargetLowering()
1913 {ISD::FMINIMUM, ISD::FMAXIMUM, ISD::FMINNUM, ISD::FMAXNUM, in addTypeForNEON()
2057 setOperationAction(ISD::FMAXIMUM, VT, Default); in addTypeForFixedLengthSVE()
7000 case ISD::FMAXIMUM: in LowerOperation()
21262 return DAG.getNode(ISD::FMAXIMUM, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp158 setOperationAction(ISD::FMAXIMUM, MVT::f16, Promote); in MipsSETargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp859 for (const auto &Op : {ISD::FMINIMUM, ISD::FMAXIMUM}) { in NVPTXTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp609 setOperationAction(ISD::FMAXIMUM, VT, Action); in X86TargetLowering()
1047 setOperationAction(ISD::FMAXIMUM, MVT::f32, Custom); in X86TargetLowering()
1087 setOperationAction(ISD::FMAXIMUM, VT, Custom); in X86TargetLowering()
1451 setOperationAction(ISD::FMAXIMUM, VT, Custom); in X86TargetLowering()
1790 setOperationAction(ISD::FMAXIMUM, VT, Custom); in X86TargetLowering()
2230 setOperationAction(ISD::FMAXIMUM, MVT::f16, Custom); in X86TargetLowering()
28275 assert((Op.getOpcode() == ISD::FMAXIMUM || Op.getOpcode() == ISD::FMINIMUM) && in LowerFMINIMUM_FMAXIMUM()
28287 if (Op.getOpcode() == ISD::FMAXIMUM) { in LowerFMINIMUM_FMAXIMUM()
32488 case ISD::FMAXIMUM: in LowerOperation()
44958 case ISD::FMAXIMUM: in scalarizeExtEltFP()

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