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Searched refs:FMA (Results 1 – 25 of 90) sorted by relevance

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/freebsd/contrib/arm-optimized-routines/math/
H A Dpoly_generic.h14 #ifndef FMA
15 # error Cannot use poly_generic without defining FMA
22 VTYPE p01 = FMA (poly[1], x, poly[0]); in VWRAP()
23 VTYPE p23 = FMA (poly[3], x, poly[2]); in VWRAP()
24 return FMA (p23, x2, p01); in VWRAP()
31 return FMA (poly[4], x4, p03); in VWRAP()
37 VTYPE p45 = FMA (poly[5], x, poly[4]); in VWRAP()
38 return FMA (p45, x4, p03); in VWRAP()
44 VTYPE p45 = FMA (poly[5], x, poly[4]); in VWRAP()
45 VTYPE p46 = FMA (poly[6], x2, p45); in VWRAP()
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H A Dpoly_scalar_f32.h17 #define FMA fmaf macro
21 #undef FMA
H A Dpoly_scalar_f64.h17 #define FMA fma macro
21 #undef FMA
/freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/
H A Dv_poly_f64.h17 #define FMA(x, y, z) vfmaq_f64 (z, x, y) macro
21 #undef FMA
H A Dv_poly_f32.h17 #define FMA(x, y, z) vfmaq_f32 (z, x, y) macro
21 #undef FMA
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFMA.td1 //===-- X86InstrFMA.td - FMA Instruction Set ---------------*- tablegen -*-===//
9 // This file describes FMA (Fused Multiply-Add) instructions.
17 // For all FMA opcodes declared in fma3p_rm_* and fma3s_rm_* multiclasses
23 // FMA*213*:
27 // FMA*132*:
31 // FMA*231*:
168 // All source register operands of FMA opcodes defined in fma3s_rm multiclass
170 // adjustment, for example, commuting the operands 1 and 2 in FMA*132 form
171 // would require an opcode change to FMA*231:
172 // FMA*132* reg1, reg2, reg3; // reg1 * reg3 + reg2;
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H A DX86InstrInfo.td62 // FMA - Fused Multiply-Add support (requires FMA)
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSchedSyntacoreSCR7.td174 ProcResourceKind FMA, ProcResourceKind FDIVSQRT> {
207 // FMA operations
209 def : WriteRes<WriteFMul32, [FPU_IS, FMA]>;
210 def : WriteRes<WriteFMul64, [FPU_IS, FMA]>;
211 def : WriteRes<WriteFMA32, [FPU_IS, FMA]>;
212 def : WriteRes<WriteFMA64, [FPU_IS, FMA]>;
369 // - FMA
H A DRISCVSchedXiangShanNanHu.td246 def : ReadAdvance<ReadFMA32Addend, 2>; // Cascade FMA
248 def : ReadAdvance<ReadFMA64Addend, 2>; // Cascade FMA
H A DRISCVSchedGenericOOO.td166 // FMA
339 // FMA
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600Subtarget.h33 bool FMA = false; variable
117 bool hasFMA() const { return FMA; } in hasFMA()
H A DAMDGPUFeatures.td16 "FMA",
18 "Enable single precision FMA (not as fast as mul+add, but fused)"
H A DGCNSubtarget.h105 bool FMA = false; variable
466 return FMA; in hasFMA()
H A DSIISelLowering.cpp217 ISD::FREM, ISD::FMA, ISD::FMINNUM, ISD::FMAXNUM, in SITargetLowering()
630 setOperationAction(ISD::FMA, MVT::f16, Legal); in SITargetLowering()
805 setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FMINNUM_IEEE, in SITargetLowering()
828 setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FCANONICALIZE}, in SITargetLowering()
840 setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG}, in SITargetLowering()
842 setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA}, in SITargetLowering()
965 ISD::FMA, in SITargetLowering()
1047 (Opcode == ISD::FMA && Subtarget->hasFmaMixInsts())) && in isFPExtFoldable()
6185 case ISD::FMA: in LowerOperation()
11171 SDValue Tmp0 = DAG.getNode(ISD::FMA, SL, VT, NegY, R, One); in lowerFastUnsafeFDIV64()
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DConstrainedOps.def82 DAG_FUNCTION(fma, 3, 1, experimental_constrained_fma, FMA)
109 // constrained FMA or FMUL + FADD intrinsics.
/freebsd/sys/cddl/dev/dtrace/x86/
H A Ddis_tables.c249 FMA, /* FMA instructions, all VEX_RMrX */ enumerator
2115 /* [94] */ INVALID, INVALID, TNSZ("vfmaddsub132p",FMA,16),TNSZ("vfmsubadd132p",FMA,16),
2116 /* [98] */ TNSZ("vfmadd132p",FMA,16),TNSZ("vfmadd132s",FMA,16),TNSZ("vfmsub132p",FMA,16),TNSZ("vf…
2117 /* [9C] */ TNSZ("vfnmadd132p",FMA,16),TNSZ("vfnmadd132s",FMA,16),TNSZ("vfnmsub132p",FMA,16),TNSZ(…
2120 /* [A4] */ INVALID, INVALID, TNSZ("vfmaddsub213p",FMA,16),TNSZ("vfmsubadd213p",FMA,16),
2121 /* [A8] */ TNSZ("vfmadd213p",FMA,16),TNSZ("vfmadd213s",FMA,16),TNSZ("vfmsub213p",FMA,16),TNSZ("vf…
2122 /* [AC] */ TNSZ("vfnmadd213p",FMA,16),TNSZ("vfnmadd213s",FMA,16),TNSZ("vfnmsub213p",FMA,16),TNSZ(…
2125 /* [B4] */ INVALID, INVALID, TNSZ("vfmaddsub231p",FMA,16),TNSZ("vfmsubadd231p",FMA,16),
2126 /* [B8] */ TNSZ("vfmadd231p",FMA,16),TNSZ("vfmadd231s",FMA,16),TNSZ("vfmsub231p",FMA,16),TNSZ("vf…
2127 /* [BC] */ TNSZ("vfnmadd231p",FMA,16),TNSZ("vfnmadd231s",FMA,16),TNSZ("vfnmsub231p",FMA,16),TNSZ(…
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/freebsd/contrib/llvm-project/libc/src/__support/FPUtil/generic/
H A DREADME.md5 the fuse-multiply-add operation (FMA). The C standard library requires three
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DEmulateInstructionRISCV.cpp1267 bool FMA(T inst, bool isDouble, float rs2_sign, float rs3_sign) { in FMA() function in lldb_private::Executor
1280 bool operator()(FMADD_S inst) { return FMA(inst, false, 1.0f, 1.0f); } in operator ()()
1281 bool operator()(FMSUB_S inst) { return FMA(inst, false, 1.0f, -1.0f); } in operator ()()
1282 bool operator()(FNMSUB_S inst) { return FMA(inst, false, -1.0f, 1.0f); } in operator ()()
1283 bool operator()(FNMADD_S inst) { return FMA(inst, false, -1.0f, -1.0f); } in operator ()()
1524 bool operator()(FMADD_D inst) { return FMA(inst, true, 1.0f, 1.0f); } in operator ()()
1525 bool operator()(FMSUB_D inst) { return FMA(inst, true, 1.0f, -1.0f); } in operator ()()
1526 bool operator()(FNMSUB_D inst) { return FMA(inst, true, -1.0f, 1.0f); } in operator ()()
1527 bool operator()(FNMADD_D inst) { return FMA(inst, true, -1.0f, -1.0f); } in operator ()()
/freebsd/sys/contrib/xen/arch-x86/
H A Dcpufeatureset.h135 XEN_CPUFEATURE(FMA, 1*32+12) /*A Fused Multiply Add */
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPNodes.def117 ADD_TERNARY_VVP_OP(VVP_FFMA,FMA) HANDLE_VP_TO_VVP(VP_FMA, VVP_FFMA) REGISTER_PACKED(VVP_FFMA)
/freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/
H A DX86.cpp395 Function *FMA; in EmitX86FMAExpr() local
398 FMA = CGF.CGM.getIntrinsic(Intrinsic::experimental_constrained_fma, Ty); in EmitX86FMAExpr()
399 Res = CGF.Builder.CreateConstrainedFPCall(FMA, {A, B, C}); in EmitX86FMAExpr()
401 FMA = CGF.CGM.getIntrinsic(Intrinsic::fma, Ty); in EmitX86FMAExpr()
402 Res = CGF.Builder.CreateCall(FMA, {A, B, C}); in EmitX86FMAExpr()
482 Function *FMA = CGF.CGM.getIntrinsic( in EmitScalarFMAExpr() local
484 Res = CGF.Builder.CreateConstrainedFPCall(FMA, Ops.slice(0, 3)); in EmitScalarFMAExpr()
486 Function *FMA = CGF.CGM.getIntrinsic(Intrinsic::fma, Ops[0]->getType()); in EmitScalarFMAExpr() local
487 Res = CGF.Builder.CreateCall(FMA, Ops.slice(0, 3)); in EmitScalarFMAExpr()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchFloat64InstrInfo.td273 // fnmadd.d: -fj * fk - fa (the nsz flag on the FMA)
281 // fnmsub.d: -fj * fk + fa (the nsz flag on the FMA)
H A DLoongArchFloat32InstrInfo.td310 // fnmadd.s: -fj * fk - fa (the nsz flag on the FMA)
318 // fnmsub.s: -fj * fk + fa (the nsz flag on the FMA)
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h511 FMA, enumerator
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DInterleavedLoadCombinePass.cpp1189 auto FMA = MSSA.getMemoryAccess(First); in combine() local
1192 if (!MSSA.dominates(MADef, FMA)) in combine()

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