/freebsd/sys/dev/uart/ |
H A D | uart_dev_imx.c | 158 SET(bas, REG(UCR1), FLD(UCR1, UARTEN)); in imx_uart_init() 159 SET(bas, REG(UCR2), FLD(UCR2, RXEN) | FLD(UCR2, TXEN)); in imx_uart_init() 256 if (c & FLD(URXD, BRK)) { in imx_uart_getc() 458 SIGCHG(bes & FLD(USR2, DCDIN), sig, SER_DCD, SER_DDCD); in imx_uart_bus_getsig() 515 if ((usr1 & FLD(USR1, TRDY)) && (ucr1 & FLD(UCR1, TRDYEN))) { in imx_uart_bus_ipend() 525 if (((usr1 & FLD(USR1, RRDY)) && (ucr1 & FLD(UCR1, RRDYEN))) || in imx_uart_bus_ipend() 526 ((usr1 & FLD(USR1, AGTIM)) && (ucr2 & FLD(UCR2, ATEN)))) { in imx_uart_bus_ipend() 533 if ((usr2 & FLD(USR2, BRCD)) && (ucr4 & FLD(UCR4, BKEN))) in imx_uart_bus_ipend() 597 if (xc & FLD(URXD, FRMERR)) in imx_uart_bus_receive() 599 if (xc & FLD(URXD, PRERR)) in imx_uart_bus_receive() [all …]
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H A D | uart_dev_imx.h | 199 #define FLD(_r, _v) IMXUART_ ## _r ## _ ## _v macro 213 #define ENA(_bas, _r, _b) SET((_bas), REG(_r), FLD(_r, _b)) 214 #define DIS(_bas, _r, _b) CLR((_bas), REG(_r), FLD(_r, _b)) 215 #define IS(_bas, _r, _b) IS_SET((_bas), REG(_r), FLD(_r, _b))
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/freebsd/sys/arm64/arm64/ |
H A D | cmn600.c | 55 #define FLD(v, n) (((v) & n ## _MASK) >> n ## _SHIFT) macro 344 node->nd_type = FLD(val, POR_CFGM_NODE_INFO_NODE_TYPE); in cmn600_create_node() 345 node->nd_id = FLD(val, POR_CFGM_NODE_INFO_NODE_ID); in cmn600_create_node() 346 node->nd_logical_id = FLD(val, POR_CFGM_NODE_INFO_LOGICAL_ID); in cmn600_create_node() 349 node->nd_child_count = FLD(val, POR_CFGM_CHILD_INFO_CHILD_COUNT); in cmn600_create_node() 350 child_offset = FLD(val, POR_CFGM_CHILD_INFO_CHILD_PTR_OFFSET); in cmn600_create_node() 359 if (FLD(val, POR_CFGM_NODE_INFO_NODE_ID) != 8) in cmn600_create_node() 362 sc->sc_mesh_x = FLD(val, POR_CFGM_NODE_INFO_LOGICAL_ID); in cmn600_create_node() 376 sc->sc_rev = FLD(val, POR_CFGM_PERIPH_ID_2_REV); in cmn600_create_node() 381 node->nd_sub = FLD(node->nd_id, NODE_ID_SUB); in cmn600_create_node() [all …]
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/freebsd/contrib/one-true-awk/ |
H A D | lib.c | 63 static Cell dollar1 = { OCELL, CFLD, NULL, EMPTY, 0.0, FLD|STR|DONTFREE, NULL, NULL }; 418 fldtab[i]->tval = FLD | STR | DONTFREE; in fldbld() 434 fldtab[i]->tval = FLD | STR | DONTFREE; in fldbld() 472 fldtab[i]->tval = FLD | STR; in fldbld() 490 fldtab[i]->tval = FLD | STR | DONTFREE; in fldbld() 533 p->tval = FLD | STR | DONTFREE; in cleanfld() 615 fldtab[i]->tval = FLD | STR | DONTFREE; in refldbld()
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H A D | awk.h | 136 #define FLD 0100 /* this is a field $1, $2, ... */ macro 227 #define isfld(n) ((n)->tval & FLD)
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H A D | tran.c | 630 { "FLD", FLD }, in flags2str()
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H A D | run.c | 336 y->tval = x->tval & ~(CON|FLD|REC); in copycell() 1540 if (x == y && !(x->tval & (FLD|REC)) && x != nfloc) in assign()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVMakeCompressible.cpp | 116 case RISCV::FLD: in log2LdstWidth() 140 case RISCV::FLD: in offsetMask() 196 case RISCV::FLD: in isCompressibleLoad()
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H A D | RISCVInstrInfoD.td | 74 def FLD : FPLoad_r<0b011, "fld", FPR64, WriteFLD64>; 185 def : InstAlias<"fld $rd, (${rs1})", (FLD FPR64:$rd, GPR:$rs1, 0), 0>; 477 def : LdPat<load, FLD, f64>;
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H A D | RISCVMergeBaseOffset.cpp | 395 case RISCV::FLD: in foldIntoMemoryOps()
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H A D | RISCVInstrInfo.cpp | 117 case RISCV::FLD: in isLoadFromStackSlot() 667 Opcode = RISCV::FLD; in loadRegFromStackSlot() 2564 case RISCV::FLD: in canFoldIntoAddrMode() 2640 case RISCV::FLD: in getMemOperandsWithOffsetWidth()
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H A D | RISCVInstrInfoC.td | 865 def : CompressPat<(FLD FPR64C:$rd, GPRCMem:$rs1, uimm8_lsb000:$imm), 988 def : CompressPat<(FLD FPR64:$rd, SPMem:$rs1, uimm9_lsb000:$imm),
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/ |
H A D | RISCVInstructions.h | 233 I_TYPE_INST(FLD); 286 FCVT_S_WU, FMV_W_X, FCVT_L_S, FCVT_LU_S, FCVT_S_L, FCVT_S_LU, FLD, FSD,
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H A D | RISCVCInstructions.h | 335 return FLD{rd, Rs{gpr_sp_riscv}, uint32_t(offset)}; in DecodeC_FLDSP() 347 return FLD{DecodeCL_RD(inst), DecodeCL_RS1(inst), uint32_t(offset)}; in DecodeC_FLD()
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H A D | EmulateInstructionRISCV.cpp | 585 {"FLD", 0x707F, 0x3007, DecodeIType<FLD>}, 1521 bool operator()(FLD inst) { return F_Load(inst, &APFloat::IEEEdouble, 64); } in operator ()()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYInstrInfoF1.td | 261 defm FLD : FT_XYAI_LD<0b0010000, "fld">;
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 862 FLD, enumerator
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H A D | X86InstrFragments.td | 770 def X86fld : SDNode<"X86ISD::FLD", SDTX86Fld,
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H A D | X86InstrFPStack.td |
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H A D | X86SchedHaswell.td | 776 // FLD.
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H A D | X86ISelDAGToDAG.cpp | 1471 X86ISD::FLD, dl, VTs, Ops, MemVT, MPI, in PreprocessISelDAG()
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H A D | X86ISelLowering.cpp | 20128 Value = DAG.getMemIntrinsicNode(X86ISD::FLD, DL, Tys, Ops, TheVT, MMO); in FP_TO_INTHelper() 21266 Src = DAG.getMemIntrinsicNode(X86ISD::FLD, DL, Tys, Ops, SrcVT, MPI, in LRINT_LLRINTHelper() 33675 NODE_NAME_CASE(FLD) in getTargetNodeName()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
H A D | RISCVAsmParser.cpp | 3658 emitLoadStoreSymbol(Inst, RISCV::FLD, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
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