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Searched refs:FIOp (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp204 int SPAdj, unsigned FIOp, in eliminateFrameIndex() argument
219 int FI = MI.getOperand(FIOp).getIndex(); in eliminateFrameIndex()
224 int RealOffset = Offset + MI.getOperand(FIOp+1).getImm(); in eliminateFrameIndex()
230 MI.getOperand(FIOp).ChangeToImmediate(RealOffset); in eliminateFrameIndex()
231 MI.removeOperand(FIOp+1); in eliminateFrameIndex()
342 MI.getOperand(FIOp).ChangeToRegister(BP, false, false, false); in eliminateFrameIndex()
343 MI.getOperand(FIOp+1).ChangeToImmediate(RealOffset); in eliminateFrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp1017 MachineOperand *FIOp = &MI.getOperand(2); in resolveFrameIndex() local
1019 if (!FIOp->isFI()) in resolveFrameIndex()
1020 std::swap(FIOp, ImmOp); in resolveFrameIndex()
1024 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
1063 MachineOperand *FIOp = &MI.getOperand(Src0Idx); in resolveFrameIndex() local
1065 if (!FIOp->isFI()) in resolveFrameIndex()
1066 std::swap(FIOp, ImmOp); in resolveFrameIndex()
1069 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
1083 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
1108 MachineOperand *FIOp = in resolveFrameIndex() local
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H A DSIFrameLowering.cpp1415 unsigned FIOp = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in processFunctionBeforeFrameFinalized() local
1417 int FI = MI.getOperand(FIOp).getIndex(); in processFunctionBeforeFrameFinalized()
1425 TRI->eliminateFrameIndex(MI, 0, FIOp, RS); in processFunctionBeforeFrameFinalized()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4275 virtual void computeKnownBitsForFrameIndex(int FIOp,