Lines Matching refs:FIOp
895 MachineOperand *FIOp = in resolveFrameIndex() local
902 assert(FIOp && FIOp->isFI() && "frame index must be address operand"); in resolveFrameIndex()
909 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
921 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
2089 MachineOperand &FIOp = MI->getOperand(FIOperandNum); in eliminateFrameIndex() local
2285 FIOp.ChangeToRegister(FrameReg, false); in eliminateFrameIndex()
2338 FIOp.ChangeToImmediate(Offset); in eliminateFrameIndex()
2339 if (TII->isImmOperandLegal(*MI, FIOperandNum, FIOp)) in eliminateFrameIndex()
2345 FIOp.ChangeToRegister(AMDGPU::M0, false); in eliminateFrameIndex()
2346 bool UseSGPR = TII->isOperandLegal(*MI, FIOperandNum, &FIOp); in eliminateFrameIndex()
2349 FIOp.setReg(FrameReg); in eliminateFrameIndex()
2358 FIOp.setReg(TmpReg); in eliminateFrameIndex()
2359 FIOp.setIsKill(); in eliminateFrameIndex()
2388 FIOp.setReg(FrameReg); in eliminateFrameIndex()
2389 FIOp.setIsKill(false); in eliminateFrameIndex()
2559 FIOp.ChangeToRegister(ResultReg, false, false, true); in eliminateFrameIndex()
2590 FIOp.ChangeToImmediate(Offset); in eliminateFrameIndex()
2591 if (!TII->isImmOperandLegal(*MI, FIOperandNum, FIOp)) { in eliminateFrameIndex()
2596 FIOp.ChangeToRegister(TmpReg, false, false, true); in eliminateFrameIndex()