| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 75 DAG_FUNCTION(ceil, 1, 0, experimental_constrained_ceil, FCEIL)
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| H A D | VPIntrinsics.def | 434 VP_PROPERTY_FUNCTIONAL_SDOPC(FCEIL)
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 987 FCEIL, enumerator
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| H A D | BasicTTIImpl.h | 2043 ISD = ISD::FCEIL; in getTypeBasedIntrinsicInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 233 case ISD::FCEIL: return "fceil"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 87 case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break; in SoftenFloatResult()
1417 case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break; in ExpandFloatResult()
2602 case ISD::FCEIL: in PromoteFloatResult()
3043 case ISD::FCEIL: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 420 case ISD::FCEIL: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 91 case ISD::FCEIL: in ScalarizeVectorResult()
1165 case ISD::FCEIL: in SplitVectorResult()
4529 case ISD::FCEIL: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 4616 case ISD::FCEIL: in ConvertNodeToLibcall()
5533 case ISD::FCEIL: in PromoteNode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 849 if (!LT.second.isVector() && TLI->isOperationCustom(ISD::FCEIL, LT.second)) in getIntrinsicInstrCost()
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| H A D | RISCVISelLowering.cpp | 447 ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FRINT, ISD::FROUND, in RISCVTargetLowering()
460 ISD::SETCC, ISD::FCEIL, ISD::FFLOOR, in RISCVTargetLowering()
949 ISD::FABS, ISD::FNEG, ISD::FCOPYSIGN, ISD::FCEIL, in RISCVTargetLowering()
985 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering()
1374 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering()
3019 case ISD::FCEIL: in matchRoundingOp()
3099 case ISD::FCEIL: in lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND()
6763 case ISD::FCEIL: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 829 ISD::FNEARBYINT, ISD::FCEIL, ISD::FRINT, ISD::FTRUNC, in initActions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 104 setOperationAction({ISD::FCEIL, ISD::FTRUNC, ISD::FROUNDEVEN, ISD::FFLOOR}, in R600TargetLowering()
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| H A D | AMDGPUISelLowering.cpp | 394 setOperationAction({ISD::FCEIL, ISD::FPOW, ISD::FABS, ISD::FFLOOR, in AMDGPUTargetLowering()
531 ISD::FADD, ISD::FCEIL, ISD::FCOS, in AMDGPUTargetLowering()
1382 case ISD::FCEIL: return LowerFCEIL(Op, DAG); in LowerOperation()
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| H A D | AMDGPUISelDAGToDAG.cpp | 159 case ISD::FCEIL: in fp16SrcZerosHighBits()
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| H A D | SIISelLowering.cpp | 215 ISD::FCEIL, ISD::FTRUNC, ISD::FRINT, ISD::FNEARBYINT, in SITargetLowering()
529 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FROUNDEVEN}, MVT::f64, in SITargetLowering()
532 setOperationAction({ISD::FCEIL, ISD::FTRUNC, ISD::FROUNDEVEN, ISD::FFLOOR}, in SITargetLowering()
12625 case ISD::FCEIL: in isCanonicalized()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 323 setOperationAction(ISD::FCEIL, MVT::ppcf128, Expand); in PPCTargetLowering()
461 setOperationAction(ISD::FCEIL, MVT::f64, Legal); in PPCTargetLowering()
466 setOperationAction(ISD::FCEIL, MVT::f32, Legal); in PPCTargetLowering()
865 setOperationAction(ISD::FCEIL, VT, Expand); in PPCTargetLowering()
929 setOperationAction(ISD::FCEIL, MVT::v4f32, Legal); in PPCTargetLowering()
1027 setOperationAction(ISD::FCEIL, MVT::v2f64, Legal); in PPCTargetLowering()
1237 setOperationAction(ISD::FCEIL, MVT::f128, Legal); in PPCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1208 case ISD::FCEIL: in PreprocessISelDAG()
1226 case ISD::FCEIL: Imm = 0xA; break; in PreprocessISelDAG()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 136 for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, in WebAssemblyTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 446 case ISD::FCEIL: in NVPTXTargetLowering()
765 for (const auto &Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FNEARBYINT, ISD::FRINT, in NVPTXTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 765 ISD::FCEIL, in AArch64TargetLowering()
813 setOperationPromotedToType(ISD::FCEIL, V4Narrow, MVT::v4f32); in AArch64TargetLowering()
834 setOperationAction(ISD::FCEIL, V8Narrow, Legal); in AArch64TargetLowering()
864 {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, in AArch64TargetLowering()
1186 ISD::FNEG, ISD::FABS, ISD::FCEIL, in AArch64TargetLowering()
1349 {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, ISD::FRINT, ISD::FTRUNC, in AArch64TargetLowering()
1600 setOperationAction(ISD::FCEIL, VT, Custom); in AArch64TargetLowering()
2052 setOperationAction(ISD::FCEIL, VT, Default); in addTypeForFixedLengthSVE()
6823 case ISD::FCEIL: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 521 setOperationAction(ISD::FCEIL, VT, Legal); in SystemZTargetLowering()
581 setOperationAction(ISD::FCEIL, MVT::v2f64, Legal); in SystemZTargetLowering()
622 setOperationAction(ISD::FCEIL, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 537 def fceil : SDNode<"ISD::FCEIL" , SDTFPUnaryOp>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 891 setOperationAction(ISD::FCEIL, MVT::v2f64, Expand); in ARMTargetLowering()
913 setOperationAction(ISD::FCEIL, MVT::v4f32, Expand); in ARMTargetLowering()
931 setOperationAction(ISD::FCEIL, MVT::v2f32, Expand); in ARMTargetLowering()
1073 setOperationAction(ISD::FCEIL, MVT::f64, Expand); in ARMTargetLowering()
1512 setOperationAction(ISD::FCEIL, MVT::f32, Legal); in ARMTargetLowering()
1528 setOperationAction(ISD::FCEIL, MVT::f64, Legal); in ARMTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 136 setOperationAction(ISD::FCEIL, MVT::f16, Promote); in MipsSETargetLowering()
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