| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.h | 138 unsigned ExtOpcode);
155 unsigned ExtOpcode);
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1783 unsigned OpIdx, unsigned ExtOpcode) { in widenScalarSrc() argument
1785 auto ExtB = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MO}); in widenScalarSrc()
1806 unsigned OpIdx, unsigned ExtOpcode) { in narrowScalarDst() argument
1810 MIRBuilder.buildInstr(ExtOpcode, {MO}, {DstTrunc}); in narrowScalarDst()
2184 unsigned ExtOpcode; in widenScalarAddSubOverflow() local
2191 ExtOpcode = TargetOpcode::G_SEXT; in widenScalarAddSubOverflow()
2195 ExtOpcode = TargetOpcode::G_SEXT; in widenScalarAddSubOverflow()
2199 ExtOpcode = TargetOpcode::G_ZEXT; in widenScalarAddSubOverflow()
2203 ExtOpcode = TargetOpcode::G_ZEXT; in widenScalarAddSubOverflow()
2207 ExtOpcode = TargetOpcode::G_SEXT; in widenScalarAddSubOverflow()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanTransforms.cpp | 1017 unsigned ExtOpcode = match(R.getOperand(0), m_SExt(m_VPValue())) in simplifyRecipe() local
1021 new VPWidenCastRecipe(Instruction::CastOps(ExtOpcode), A, TruncTy); in simplifyRecipe()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 2224 auto ExtOpcode = ExtInst->getOpcode(); in foldSelectExtConst() local
2225 if (ExtOpcode != Instruction::ZExt && ExtOpcode != Instruction::SExt) in foldSelectExtConst()
2241 Constant *TruncC = getLosslessTrunc(C, SmallType, ExtOpcode); in foldSelectExtConst()
2250 return CastInst::Create(Instruction::CastOps(ExtOpcode), NewSel, SelType); in foldSelectExtConst()
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| H A D | InstCombineShifts.cpp | 800 auto ExtOpcode = (I.getOpcode() == Instruction::AShr) ? Instruction::SExt in FoldShiftByConstant() local
802 return CastInst::Create(ExtOpcode, Cmp, Ty); in FoldShiftByConstant()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1721 unpackV2S16ToS32(MachineIRBuilder &B, Register Src, unsigned ExtOpcode) { in unpackV2S16ToS32() argument
1725 if (ExtOpcode == TargetOpcode::G_SEXT) { in unpackV2S16ToS32()
1732 if (ExtOpcode == TargetOpcode::G_ZEXT) { in unpackV2S16ToS32()
1737 assert(ExtOpcode == TargetOpcode::G_ANYEXT); in unpackV2S16ToS32()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4969 unsigned ExtOpcode) { in addRequiredExtensionForVectorMULL() argument
4980 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in addRequiredExtensionForVectorMULL()
6248 unsigned ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerMGATHER() local
6249 Index = DAG.getNode(ExtOpcode, DL, PromotedVT, Index); in LowerMGATHER()
6338 unsigned ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerMSCATTER() local
6339 Index = DAG.getNode(ExtOpcode, DL, PromotedVT, Index); in LowerMSCATTER()
17736 unsigned ExtOpcode = Op0.getOpcode(); in performVecReduceAddCombine() local
17739 if (ExtOpcode == ISD::MUL) { in performVecReduceAddCombine()
17745 ExtOpcode = A.getOpcode(); in performVecReduceAddCombine()
17747 if (ExtOpcode != ISD::ZERO_EXTEND && ExtOpcode != ISD::SIGN_EXTEND) in performVecReduceAddCombine()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 12386 auto ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in visitVSELECT() local
12387 SDValue WideLHS = DAG.getNode(ExtOpcode, DL, WideVT, LHS); in visitVSELECT()
12388 SDValue WideRHS = DAG.getNode(ExtOpcode, DL, WideVT, RHS); in visitVSELECT()
12794 static bool isCompatibleLoad(SDValue N, unsigned ExtOpcode) { in isCompatibleLoad() argument
12808 if ((LoadExt == ISD::SEXTLOAD && ExtOpcode != ISD::SIGN_EXTEND) || in isCompatibleLoad()
12809 (LoadExt == ISD::ZEXTLOAD && ExtOpcode != ISD::ZERO_EXTEND)) in isCompatibleLoad()
13488 unsigned ExtOpcode = IsSignedCmp ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in foldSextSetcc() local
13516 if (User->getOpcode() != ExtOpcode || User->getValueType(0) != VT) in foldSextSetcc()
13523 SDValue Ext0 = DAG.getNode(ExtOpcode, DL, VT, N00); in foldSextSetcc()
13524 SDValue Ext1 = DAG.getNode(ExtOpcode, DL, VT, N01); in foldSextSetcc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 7462 unsigned ExtOpcode = in combineINT_TO_FP() local
7464 SDValue ExtOp = DAG.getNode(ExtOpcode, SDLoc(N), ExtVT, Op); in combineINT_TO_FP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6594 unsigned ExtOpcode = (Op.getOpcode() == ISD::UINT_TO_FP || in LowerOperation()
6598 SDValue Ext = DAG.getNode(ExtOpcode, DL, IVecVT, Src); in LowerOperation()
6592 unsigned ExtOpcode = (Op.getOpcode() == ISD::UINT_TO_FP || LowerOperation() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9511 unsigned ExtOpcode) { in AddRequiredExtensionForVMULL() argument
9522 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in AddRequiredExtensionForVMULL()
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