4969                                                  unsigned ExtOpcode) {  in addRequiredExtensionForVectorMULL()  argument
4980   return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N);  in addRequiredExtensionForVectorMULL()
6248     unsigned ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;  in LowerMGATHER()  local
6249     Index = DAG.getNode(ExtOpcode, DL, PromotedVT, Index);  in LowerMGATHER()
6338     unsigned ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;  in LowerMSCATTER()  local
6339     Index = DAG.getNode(ExtOpcode, DL, PromotedVT, Index);  in LowerMSCATTER()
17736   unsigned ExtOpcode = Op0.getOpcode();  in performVecReduceAddCombine()  local
17739   if (ExtOpcode == ISD::MUL) {  in performVecReduceAddCombine()
17745     ExtOpcode = A.getOpcode();  in performVecReduceAddCombine()
17747   if (ExtOpcode != ISD::ZERO_EXTEND && ExtOpcode != ISD::SIGN_EXTEND)  in performVecReduceAddCombine()
17775       (ExtOpcode == ISD::ZERO_EXTEND) ? AArch64ISD::UDOT : AArch64ISD::SDOT;  in performVecReduceAddCombine()