Searched refs:ETH_MII_ACC_MII_BUSY_ (Results 1 – 2 of 2) sorted by relevance
665 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != in lan78xx_miibus_readreg()672 ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_; in lan78xx_miibus_readreg()675 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != in lan78xx_miibus_readreg()720 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != in lan78xx_miibus_writereg()730 ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_; in lan78xx_miibus_writereg()733 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0) in lan78xx_miibus_writereg()
235 #define ETH_MII_ACC_MII_BUSY_ (0x1UL << 0) macro