xref: /freebsd/sys/dev/usb/net/if_muge.c (revision ca48e43ba9ee73a07cdbad8365117793b01273bb)
1d30c739cSEd Maste /*-
24d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
3d30c739cSEd Maste  *
4d30c739cSEd Maste  * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>.
5d30c739cSEd Maste  * Copyright (C) 2018 The FreeBSD Foundation.
6d30c739cSEd Maste  *
7d30c739cSEd Maste  * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com>
8d30c739cSEd Maste  * under sponsorship from the FreeBSD Foundation.
9d30c739cSEd Maste  *
10d30c739cSEd Maste  * Redistribution and use in source and binary forms, with or without
11d30c739cSEd Maste  * modification, are permitted provided that the following conditions
12d30c739cSEd Maste  * are met:
13d30c739cSEd Maste  * 1. Redistributions of source code must retain the above copyright
14d30c739cSEd Maste  *    notice, this list of conditions and the following disclaimer.
15d30c739cSEd Maste  * 2. Redistributions in binary form must reproduce the above copyright
16d30c739cSEd Maste  *    notice, this list of conditions and the following disclaimer in the
17d30c739cSEd Maste  *    documentation and/or other materials provided with the distribution.
18d30c739cSEd Maste  *
19d30c739cSEd Maste  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20d30c739cSEd Maste  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21d30c739cSEd Maste  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22d30c739cSEd Maste  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23d30c739cSEd Maste  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24d30c739cSEd Maste  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25d30c739cSEd Maste  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26d30c739cSEd Maste  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27d30c739cSEd Maste  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28d30c739cSEd Maste  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29d30c739cSEd Maste  * SUCH DAMAGE.
30d30c739cSEd Maste  */
31d30c739cSEd Maste 
32d30c739cSEd Maste /*
33d30c739cSEd Maste  * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families.
34d30c739cSEd Maste  *
35d30c739cSEd Maste  * USB 3.1 to 10/100/1000 Mbps Ethernet
36d30c739cSEd Maste  * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800
37d30c739cSEd Maste  *
382d14fb8bSEd Maste  * USB 2.0 to 10/100/1000 Mbps Ethernet
392d14fb8bSEd Maste  * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850
402d14fb8bSEd Maste  *
41d30c739cSEd Maste  * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub
42d30c739cSEd Maste  * LAN7515 (no datasheet available, but probes and functions as LAN7800)
43d30c739cSEd Maste  *
44d30c739cSEd Maste  * This driver is based on the if_smsc driver, with lan78xx-specific
45d30c739cSEd Maste  * functionality modelled on Microchip's Linux lan78xx driver.
46d30c739cSEd Maste  *
47d30c739cSEd Maste  * UNIMPLEMENTED FEATURES
48d30c739cSEd Maste  * ------------------
49d30c739cSEd Maste  * A number of features supported by the lan78xx are not yet implemented in
50d30c739cSEd Maste  * this driver:
51d30c739cSEd Maste  *
520d5e6868SEd Maste  * - TX checksum offloading: Nothing has been implemented yet.
53515a5d02SEd Maste  * - Direct address translation filtering: Implemented but untested.
54515a5d02SEd Maste  * - VLAN tag removal.
55515a5d02SEd Maste  * - Support for USB interrupt endpoints.
56515a5d02SEd Maste  * - Latency Tolerance Messaging (LTM) support.
57515a5d02SEd Maste  * - TCP LSO support.
58d30c739cSEd Maste  *
59d30c739cSEd Maste  */
60d30c739cSEd Maste 
61d30c739cSEd Maste #include <sys/param.h>
62d30c739cSEd Maste #include <sys/bus.h>
63d30c739cSEd Maste #include <sys/callout.h>
64d30c739cSEd Maste #include <sys/condvar.h>
65d30c739cSEd Maste #include <sys/kernel.h>
66d30c739cSEd Maste #include <sys/lock.h>
67d30c739cSEd Maste #include <sys/malloc.h>
68d30c739cSEd Maste #include <sys/module.h>
69d30c739cSEd Maste #include <sys/mutex.h>
70d30c739cSEd Maste #include <sys/priv.h>
71d30c739cSEd Maste #include <sys/queue.h>
72d30c739cSEd Maste #include <sys/random.h>
73d30c739cSEd Maste #include <sys/socket.h>
74d30c739cSEd Maste #include <sys/stddef.h>
75d30c739cSEd Maste #include <sys/stdint.h>
76d30c739cSEd Maste #include <sys/sx.h>
77d30c739cSEd Maste #include <sys/sysctl.h>
78d30c739cSEd Maste #include <sys/systm.h>
79d30c739cSEd Maste #include <sys/unistd.h>
80d30c739cSEd Maste 
81d30c739cSEd Maste #include <net/if.h>
82d30c739cSEd Maste #include <net/if_var.h>
8331c484adSJustin Hibbits #include <net/if_media.h>
8431c484adSJustin Hibbits 
8531c484adSJustin Hibbits #include <dev/mii/mii.h>
8631c484adSJustin Hibbits #include <dev/mii/miivar.h>
87d30c739cSEd Maste 
88d30c739cSEd Maste #include <netinet/in.h>
89d30c739cSEd Maste #include <netinet/ip.h>
90d30c739cSEd Maste 
91d30c739cSEd Maste #include "opt_platform.h"
92d30c739cSEd Maste 
93b4872d67SOleksandr Tymoshenko #ifdef FDT
94b4872d67SOleksandr Tymoshenko #include <dev/fdt/fdt_common.h>
95b4872d67SOleksandr Tymoshenko #include <dev/ofw/ofw_bus.h>
96b4872d67SOleksandr Tymoshenko #include <dev/ofw/ofw_bus_subr.h>
9718dc4538SIan Lepore #include <dev/usb/usb_fdt_support.h>
98b4872d67SOleksandr Tymoshenko #endif
99b4872d67SOleksandr Tymoshenko 
100d30c739cSEd Maste #include <dev/usb/usb.h>
101d30c739cSEd Maste #include <dev/usb/usbdi.h>
102d30c739cSEd Maste #include <dev/usb/usbdi_util.h>
103d30c739cSEd Maste #include "usbdevs.h"
104d30c739cSEd Maste 
105d30c739cSEd Maste #define USB_DEBUG_VAR lan78xx_debug
106d30c739cSEd Maste #include <dev/usb/usb_debug.h>
107d30c739cSEd Maste #include <dev/usb/usb_process.h>
108d30c739cSEd Maste 
109d30c739cSEd Maste #include <dev/usb/net/usb_ethernet.h>
110d30c739cSEd Maste 
111d30c739cSEd Maste #include <dev/usb/net/if_mugereg.h>
112d30c739cSEd Maste 
11331c484adSJustin Hibbits #include "miibus_if.h"
11431c484adSJustin Hibbits 
115d30c739cSEd Maste #ifdef USB_DEBUG
116d30c739cSEd Maste static int muge_debug = 0;
117d30c739cSEd Maste 
118f8d2b1f3SPawel Biernacki SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
119d30c739cSEd Maste     "Microchip LAN78xx USB-GigE");
120d30c739cSEd Maste SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0,
121d30c739cSEd Maste     "Debug level");
122d30c739cSEd Maste #endif
123d30c739cSEd Maste 
124d30c739cSEd Maste #define MUGE_DEFAULT_TX_CSUM_ENABLE (false)
1256c0331eaSEd Maste #define MUGE_DEFAULT_TSO_ENABLE (false)
126d30c739cSEd Maste 
127d30c739cSEd Maste /* Supported Vendor and Product IDs. */
128d30c739cSEd Maste static const struct usb_device_id lan78xx_devs[] = {
129d30c739cSEd Maste #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) }
130d30c739cSEd Maste 	MUGE_DEV(LAN7800_ETH, 0),
13149b2a5feSEd Maste 	MUGE_DEV(LAN7801_ETH, 0),
13249b2a5feSEd Maste 	MUGE_DEV(LAN7850_ETH, 0),
133d30c739cSEd Maste #undef MUGE_DEV
134d30c739cSEd Maste };
135d30c739cSEd Maste 
136d30c739cSEd Maste #ifdef USB_DEBUG
137087522b8SAndreas Tobler #define muge_dbg_printf(sc, fmt, args...) \
138d30c739cSEd Maste do { \
139d30c739cSEd Maste 	if (muge_debug > 0) \
140d30c739cSEd Maste 		device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \
141d30c739cSEd Maste } while(0)
142d30c739cSEd Maste #else
143d30c739cSEd Maste #define muge_dbg_printf(sc, fmt, args...) do { } while (0)
144d30c739cSEd Maste #endif
145d30c739cSEd Maste 
146d30c739cSEd Maste #define muge_warn_printf(sc, fmt, args...) \
147d30c739cSEd Maste 	device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args)
148d30c739cSEd Maste 
149d30c739cSEd Maste #define muge_err_printf(sc, fmt, args...) \
150d30c739cSEd Maste 	device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args)
151d30c739cSEd Maste 
152d30c739cSEd Maste #define ETHER_IS_VALID(addr) \
153d30c739cSEd Maste 	(!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
154d30c739cSEd Maste 
155d30c739cSEd Maste /* USB endpoints. */
156d30c739cSEd Maste 
157d30c739cSEd Maste enum {
158d30c739cSEd Maste 	MUGE_BULK_DT_RD,
159d30c739cSEd Maste 	MUGE_BULK_DT_WR,
160e5151258SEd Maste #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */
161e5151258SEd Maste 	MUGE_INTR_DT_WR,
162e5151258SEd Maste 	MUGE_INTR_DT_RD,
163e5151258SEd Maste #endif
164d30c739cSEd Maste 	MUGE_N_TRANSFER,
165d30c739cSEd Maste };
166d30c739cSEd Maste 
167d30c739cSEd Maste struct muge_softc {
168d30c739cSEd Maste 	struct usb_ether	sc_ue;
169d30c739cSEd Maste 	struct mtx		sc_mtx;
170d30c739cSEd Maste 	struct usb_xfer		*sc_xfer[MUGE_N_TRANSFER];
171d30c739cSEd Maste 	int			sc_phyno;
17260ce15edSEd Maste 	uint32_t		sc_leds;
17303dec173SEd Maste 	uint16_t		sc_led_modes;
17403dec173SEd Maste 	uint16_t		sc_led_modes_mask;
175d30c739cSEd Maste 
176d30c739cSEd Maste 	/* Settings for the mac control (MAC_CSR) register. */
177d30c739cSEd Maste 	uint32_t		sc_rfe_ctl;
178d30c739cSEd Maste 	uint32_t		sc_mdix_ctl;
17903ba5353SEd Maste 	uint16_t		chipid;
18003ba5353SEd Maste 	uint16_t		chiprev;
18148bc1758SEd Maste 	uint32_t		sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN];
182d30c739cSEd Maste 	uint32_t		sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2];
183d30c739cSEd Maste 
184d30c739cSEd Maste 	uint32_t		sc_flags;
185d30c739cSEd Maste #define	MUGE_FLAG_LINK		0x0001
18649b2a5feSEd Maste #define	MUGE_FLAG_INIT_DONE	0x0002
187d30c739cSEd Maste };
188d30c739cSEd Maste 
189d30c739cSEd Maste #define MUGE_IFACE_IDX		0
190d30c739cSEd Maste 
191d30c739cSEd Maste #define MUGE_LOCK(_sc)			mtx_lock(&(_sc)->sc_mtx)
192d30c739cSEd Maste #define MUGE_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
193d30c739cSEd Maste #define MUGE_LOCK_ASSERT(_sc, t)	mtx_assert(&(_sc)->sc_mtx, t)
194d30c739cSEd Maste 
195d30c739cSEd Maste static device_probe_t muge_probe;
196d30c739cSEd Maste static device_attach_t muge_attach;
197d30c739cSEd Maste static device_detach_t muge_detach;
198d30c739cSEd Maste 
199d30c739cSEd Maste static usb_callback_t muge_bulk_read_callback;
200d30c739cSEd Maste static usb_callback_t muge_bulk_write_callback;
201d30c739cSEd Maste 
202d30c739cSEd Maste static miibus_readreg_t lan78xx_miibus_readreg;
203d30c739cSEd Maste static miibus_writereg_t lan78xx_miibus_writereg;
204d30c739cSEd Maste static miibus_statchg_t lan78xx_miibus_statchg;
205d30c739cSEd Maste 
206d30c739cSEd Maste static int muge_attach_post_sub(struct usb_ether *ue);
207d30c739cSEd Maste static uether_fn_t muge_attach_post;
208d30c739cSEd Maste static uether_fn_t muge_init;
209d30c739cSEd Maste static uether_fn_t muge_stop;
210d30c739cSEd Maste static uether_fn_t muge_start;
211d30c739cSEd Maste static uether_fn_t muge_tick;
212d30c739cSEd Maste static uether_fn_t muge_setmulti;
213d30c739cSEd Maste static uether_fn_t muge_setpromisc;
214d30c739cSEd Maste 
215935b194dSJustin Hibbits static int muge_ifmedia_upd(if_t);
216935b194dSJustin Hibbits static void muge_ifmedia_sts(if_t, struct ifmediareq *);
217d30c739cSEd Maste 
218d30c739cSEd Maste static int lan78xx_chip_init(struct muge_softc *sc);
219935b194dSJustin Hibbits static int muge_ioctl(if_t ifp, u_long cmd, caddr_t data);
220d30c739cSEd Maste 
221d30c739cSEd Maste static const struct usb_config muge_config[MUGE_N_TRANSFER] = {
222d30c739cSEd Maste 	[MUGE_BULK_DT_WR] = {
223d30c739cSEd Maste 		.type = UE_BULK,
224d30c739cSEd Maste 		.endpoint = UE_ADDR_ANY,
225d30c739cSEd Maste 		.direction = UE_DIR_OUT,
226d30c739cSEd Maste 		.frames = 16,
227d30c739cSEd Maste 		.bufsize = 16 * (MCLBYTES + 16),
228d30c739cSEd Maste 		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
229d30c739cSEd Maste 		.callback = muge_bulk_write_callback,
230d30c739cSEd Maste 		.timeout = 10000,	/* 10 seconds */
231d30c739cSEd Maste 	},
232d30c739cSEd Maste 
233d30c739cSEd Maste 	[MUGE_BULK_DT_RD] = {
234d30c739cSEd Maste 		.type = UE_BULK,
235d30c739cSEd Maste 		.endpoint = UE_ADDR_ANY,
236d30c739cSEd Maste 		.direction = UE_DIR_IN,
237d30c739cSEd Maste 		.bufsize = 20480,	/* bytes */
238d30c739cSEd Maste 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
239d30c739cSEd Maste 		.callback = muge_bulk_read_callback,
240d30c739cSEd Maste 		.timeout = 0,	/* no timeout */
241d30c739cSEd Maste 	},
242d30c739cSEd Maste 	/*
243d30c739cSEd Maste 	 * The chip supports interrupt endpoints, however they aren't
244d30c739cSEd Maste 	 * needed as we poll on the MII status.
245d30c739cSEd Maste 	 */
246d30c739cSEd Maste };
247d30c739cSEd Maste 
248d30c739cSEd Maste static const struct usb_ether_methods muge_ue_methods = {
249d30c739cSEd Maste 	.ue_attach_post = muge_attach_post,
250d30c739cSEd Maste 	.ue_attach_post_sub = muge_attach_post_sub,
251d30c739cSEd Maste 	.ue_start = muge_start,
252d30c739cSEd Maste 	.ue_ioctl = muge_ioctl,
253d30c739cSEd Maste 	.ue_init = muge_init,
254d30c739cSEd Maste 	.ue_stop = muge_stop,
255d30c739cSEd Maste 	.ue_tick = muge_tick,
256d30c739cSEd Maste 	.ue_setmulti = muge_setmulti,
257d30c739cSEd Maste 	.ue_setpromisc = muge_setpromisc,
258d30c739cSEd Maste 	.ue_mii_upd = muge_ifmedia_upd,
259d30c739cSEd Maste 	.ue_mii_sts = muge_ifmedia_sts,
260d30c739cSEd Maste };
261d30c739cSEd Maste 
262d30c739cSEd Maste /**
263d30c739cSEd Maste  *	lan78xx_read_reg - Read a 32-bit register on the device
264d30c739cSEd Maste  *	@sc: driver soft context
265d30c739cSEd Maste  *	@off: offset of the register
266d30c739cSEd Maste  *	@data: pointer a value that will be populated with the register value
267d30c739cSEd Maste  *
268d30c739cSEd Maste  *	LOCKING:
269d30c739cSEd Maste  *	The device lock must be held before calling this function.
270d30c739cSEd Maste  *
271d30c739cSEd Maste  *	RETURNS:
272d30c739cSEd Maste  *	0 on success, a USB_ERR_?? error code on failure.
273d30c739cSEd Maste  */
274d30c739cSEd Maste static int
lan78xx_read_reg(struct muge_softc * sc,uint32_t off,uint32_t * data)275d30c739cSEd Maste lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data)
276d30c739cSEd Maste {
277d30c739cSEd Maste 	struct usb_device_request req;
278d30c739cSEd Maste 	uint32_t buf;
279d30c739cSEd Maste 	usb_error_t err;
280d30c739cSEd Maste 
281d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
282d30c739cSEd Maste 
283d30c739cSEd Maste 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
284d30c739cSEd Maste 	req.bRequest = UVR_READ_REG;
285d30c739cSEd Maste 	USETW(req.wValue, 0);
286d30c739cSEd Maste 	USETW(req.wIndex, off);
287d30c739cSEd Maste 	USETW(req.wLength, 4);
288d30c739cSEd Maste 
289d30c739cSEd Maste 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
290d30c739cSEd Maste 	if (err != 0)
291d30c739cSEd Maste 		muge_warn_printf(sc, "Failed to read register 0x%0x\n", off);
292d30c739cSEd Maste 	*data = le32toh(buf);
293d30c739cSEd Maste 	return (err);
294d30c739cSEd Maste }
295d30c739cSEd Maste 
296d30c739cSEd Maste /**
297d30c739cSEd Maste  *	lan78xx_write_reg - Write a 32-bit register on the device
298d30c739cSEd Maste  *	@sc: driver soft context
299d30c739cSEd Maste  *	@off: offset of the register
300d30c739cSEd Maste  *	@data: the 32-bit value to write into the register
301d30c739cSEd Maste  *
302d30c739cSEd Maste  *	LOCKING:
303d30c739cSEd Maste  *	The device lock must be held before calling this function.
304d30c739cSEd Maste  *
305d30c739cSEd Maste  *	RETURNS:
306d30c739cSEd Maste  *	0 on success, a USB_ERR_?? error code on failure.
307d30c739cSEd Maste  */
308d30c739cSEd Maste static int
lan78xx_write_reg(struct muge_softc * sc,uint32_t off,uint32_t data)309d30c739cSEd Maste lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data)
310d30c739cSEd Maste {
311d30c739cSEd Maste 	struct usb_device_request req;
312d30c739cSEd Maste 	uint32_t buf;
313d30c739cSEd Maste 	usb_error_t err;
314d30c739cSEd Maste 
315d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
316d30c739cSEd Maste 
317d30c739cSEd Maste 	buf = htole32(data);
318d30c739cSEd Maste 
319d30c739cSEd Maste 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
320d30c739cSEd Maste 	req.bRequest = UVR_WRITE_REG;
321d30c739cSEd Maste 	USETW(req.wValue, 0);
322d30c739cSEd Maste 	USETW(req.wIndex, off);
323d30c739cSEd Maste 	USETW(req.wLength, 4);
324d30c739cSEd Maste 
325d30c739cSEd Maste 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
326d30c739cSEd Maste 	if (err != 0)
327d30c739cSEd Maste 		muge_warn_printf(sc, "Failed to write register 0x%0x\n", off);
328d30c739cSEd Maste 	return (err);
329d30c739cSEd Maste }
330d30c739cSEd Maste 
331d30c739cSEd Maste /**
332d30c739cSEd Maste  *	lan78xx_wait_for_bits - Poll on a register value until bits are cleared
333d30c739cSEd Maste  *	@sc: soft context
334d30c739cSEd Maste  *	@reg: offset of the register
335d30c739cSEd Maste  *	@bits: if the bits are clear the function returns
336d30c739cSEd Maste  *
337d30c739cSEd Maste  *	LOCKING:
338d30c739cSEd Maste  *	The device lock must be held before calling this function.
339d30c739cSEd Maste  *
340d30c739cSEd Maste  *	RETURNS:
341d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
342d30c739cSEd Maste  */
343d30c739cSEd Maste static int
lan78xx_wait_for_bits(struct muge_softc * sc,uint32_t reg,uint32_t bits)344d30c739cSEd Maste lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits)
345d30c739cSEd Maste {
346d30c739cSEd Maste 	usb_ticks_t start_ticks;
347d30c739cSEd Maste 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
348d30c739cSEd Maste 	uint32_t val;
349d30c739cSEd Maste 	int err;
350d30c739cSEd Maste 
351d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
352d30c739cSEd Maste 
353d30c739cSEd Maste 	start_ticks = (usb_ticks_t)ticks;
354d30c739cSEd Maste 	do {
355d30c739cSEd Maste 		if ((err = lan78xx_read_reg(sc, reg, &val)) != 0)
356d30c739cSEd Maste 			return (err);
357d30c739cSEd Maste 		if (!(val & bits))
358d30c739cSEd Maste 			return (0);
359d30c739cSEd Maste 		uether_pause(&sc->sc_ue, hz / 100);
360d30c739cSEd Maste 	} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
361d30c739cSEd Maste 
362d30c739cSEd Maste 	return (USB_ERR_TIMEOUT);
363d30c739cSEd Maste }
364d30c739cSEd Maste 
365d30c739cSEd Maste /**
366d30c739cSEd Maste  *	lan78xx_eeprom_read_raw - Read the attached EEPROM
367d30c739cSEd Maste  *	@sc: soft context
368d30c739cSEd Maste  *	@off: the eeprom address offset
369d30c739cSEd Maste  *	@buf: stores the bytes
370d30c739cSEd Maste  *	@buflen: the number of bytes to read
371d30c739cSEd Maste  *
372d30c739cSEd Maste  *	Simply reads bytes from an attached eeprom.
373d30c739cSEd Maste  *
374d30c739cSEd Maste  *	LOCKING:
375d30c739cSEd Maste  *	The function takes and releases the device lock if not already held.
376d30c739cSEd Maste  *
377d30c739cSEd Maste  *	RETURNS:
378d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
379d30c739cSEd Maste  */
380d30c739cSEd Maste static int
lan78xx_eeprom_read_raw(struct muge_softc * sc,uint16_t off,uint8_t * buf,uint16_t buflen)381d30c739cSEd Maste lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
382d30c739cSEd Maste     uint16_t buflen)
383d30c739cSEd Maste {
384d30c739cSEd Maste 	usb_ticks_t start_ticks;
385d30c739cSEd Maste 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
38615f16425SEd Maste 	int err;
387d30c739cSEd Maste 	uint32_t val, saved;
388d30c739cSEd Maste 	uint16_t i;
38915f16425SEd Maste 	bool locked;
390d30c739cSEd Maste 
391d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx); /* XXX */
392d30c739cSEd Maste 	if (!locked)
393d30c739cSEd Maste 		MUGE_LOCK(sc);
394d30c739cSEd Maste 
3952d14fb8bSEd Maste 	if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) {
3962d14fb8bSEd Maste 		/* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */
39748bc1758SEd Maste 		err = lan78xx_read_reg(sc, ETH_HW_CFG, &val);
398d30c739cSEd Maste 		saved = val;
399d30c739cSEd Maste 
40048bc1758SEd Maste 		val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_);
40148bc1758SEd Maste 		err = lan78xx_write_reg(sc, ETH_HW_CFG, val);
4022d14fb8bSEd Maste 	}
403d30c739cSEd Maste 
40448bc1758SEd Maste 	err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_);
405d30c739cSEd Maste 	if (err != 0) {
406d30c739cSEd Maste 		muge_warn_printf(sc, "eeprom busy, failed to read data\n");
407d30c739cSEd Maste 		goto done;
408d30c739cSEd Maste 	}
409d30c739cSEd Maste 
410d30c739cSEd Maste 	/* Start reading the bytes, one at a time. */
411d30c739cSEd Maste 	for (i = 0; i < buflen; i++) {
41248bc1758SEd Maste 		val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_;
41348bc1758SEd Maste 		val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i));
41448bc1758SEd Maste 		if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0)
415d30c739cSEd Maste 			goto done;
416d30c739cSEd Maste 
417d30c739cSEd Maste 		start_ticks = (usb_ticks_t)ticks;
418d30c739cSEd Maste 		do {
41948bc1758SEd Maste 			if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) !=
42048bc1758SEd Maste 			    0)
421d30c739cSEd Maste 				goto done;
42248bc1758SEd Maste 			if (!(val & ETH_E2P_CMD_BUSY_) ||
42348bc1758SEd Maste 			    (val & ETH_E2P_CMD_TIMEOUT_))
424d30c739cSEd Maste 				break;
425d30c739cSEd Maste 
426d30c739cSEd Maste 			uether_pause(&sc->sc_ue, hz / 100);
427d30c739cSEd Maste 		} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
428d30c739cSEd Maste 
42948bc1758SEd Maste 		if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) {
430d30c739cSEd Maste 			muge_warn_printf(sc, "eeprom command failed\n");
431d30c739cSEd Maste 			err = USB_ERR_IOERROR;
432d30c739cSEd Maste 			break;
433d30c739cSEd Maste 		}
434d30c739cSEd Maste 
43548bc1758SEd Maste 		if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0)
436d30c739cSEd Maste 			goto done;
437d30c739cSEd Maste 
438d30c739cSEd Maste 		buf[i] = (val & 0xff);
439d30c739cSEd Maste 	}
440d30c739cSEd Maste 
441d30c739cSEd Maste done:
442d30c739cSEd Maste 	if (!locked)
443d30c739cSEd Maste 		MUGE_UNLOCK(sc);
4442d14fb8bSEd Maste 	if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) {
4452d14fb8bSEd Maste 		/* Restore saved LED configuration. */
44648bc1758SEd Maste 		lan78xx_write_reg(sc, ETH_HW_CFG, saved);
4472d14fb8bSEd Maste 	}
448d30c739cSEd Maste 	return (err);
449d30c739cSEd Maste }
450d30c739cSEd Maste 
4512c8cf0c5SEd Maste static bool
lan78xx_eeprom_present(struct muge_softc * sc)4522c8cf0c5SEd Maste lan78xx_eeprom_present(struct muge_softc *sc)
453d30c739cSEd Maste {
454d30c739cSEd Maste 	int ret;
4552c8cf0c5SEd Maste 	uint8_t sig;
456d30c739cSEd Maste 
45748bc1758SEd Maste 	ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1);
4582c8cf0c5SEd Maste 	return (ret == 0 && sig == ETH_E2P_INDICATOR);
459d30c739cSEd Maste }
460d30c739cSEd Maste 
461d30c739cSEd Maste /**
462d30c739cSEd Maste  *	lan78xx_otp_read_raw
463d30c739cSEd Maste  *	@sc: soft context
464d30c739cSEd Maste  *	@off: the otp address offset
465d30c739cSEd Maste  *	@buf: stores the bytes
466d30c739cSEd Maste  *	@buflen: the number of bytes to read
467d30c739cSEd Maste  *
468d30c739cSEd Maste  *	Simply reads bytes from the OTP.
469d30c739cSEd Maste  *
470d30c739cSEd Maste  *	LOCKING:
471d30c739cSEd Maste  *	The function takes and releases the device lock if not already held.
472d30c739cSEd Maste  *
473d30c739cSEd Maste  *	RETURNS:
474d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
475d30c739cSEd Maste  *
476d30c739cSEd Maste  */
477d30c739cSEd Maste static int
lan78xx_otp_read_raw(struct muge_softc * sc,uint16_t off,uint8_t * buf,uint16_t buflen)478d30c739cSEd Maste lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
479d30c739cSEd Maste     uint16_t buflen)
480d30c739cSEd Maste {
48115f16425SEd Maste 	int err;
482d30c739cSEd Maste 	uint32_t val;
483d30c739cSEd Maste 	uint16_t i;
48415f16425SEd Maste 	bool locked;
485d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
486d30c739cSEd Maste 	if (!locked)
487d30c739cSEd Maste 		MUGE_LOCK(sc);
488d30c739cSEd Maste 
489d30c739cSEd Maste 	err = lan78xx_read_reg(sc, OTP_PWR_DN, &val);
490d30c739cSEd Maste 
491e5151258SEd Maste 	/* Checking if bit is set. */
492d30c739cSEd Maste 	if (val & OTP_PWR_DN_PWRDN_N) {
493e5151258SEd Maste 		/* Clear it, then wait for it to be cleared. */
494d30c739cSEd Maste 		lan78xx_write_reg(sc, OTP_PWR_DN, 0);
495d30c739cSEd Maste 		err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N);
496d30c739cSEd Maste 		if (err != 0) {
497d30c739cSEd Maste 			muge_warn_printf(sc, "OTP off? failed to read data\n");
498d30c739cSEd Maste 			goto done;
499d30c739cSEd Maste 		}
500d30c739cSEd Maste 	}
501e5151258SEd Maste 	/* Start reading the bytes, one at a time. */
502d30c739cSEd Maste 	for (i = 0; i < buflen; i++) {
503d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_ADDR1,
504d30c739cSEd Maste 		    ((off + i) >> 8) & OTP_ADDR1_15_11);
505d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_ADDR2,
506d30c739cSEd Maste 		    ((off + i) & OTP_ADDR2_10_3));
507d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
508d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_);
509d30c739cSEd Maste 
510d30c739cSEd Maste 		err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_);
511d30c739cSEd Maste 		if (err != 0) {
512d30c739cSEd Maste 			muge_warn_printf(sc, "OTP busy failed to read data\n");
513d30c739cSEd Maste 			goto done;
514d30c739cSEd Maste 		}
515d30c739cSEd Maste 
516d30c739cSEd Maste 		if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0)
517d30c739cSEd Maste 			goto done;
518d30c739cSEd Maste 
519d30c739cSEd Maste 		buf[i] = (uint8_t)(val & 0xff);
520d30c739cSEd Maste 	}
521d30c739cSEd Maste 
522d30c739cSEd Maste done:
523d30c739cSEd Maste 	if (!locked)
524d30c739cSEd Maste 		MUGE_UNLOCK(sc);
525d30c739cSEd Maste 	return (err);
526d30c739cSEd Maste }
527d30c739cSEd Maste 
528d30c739cSEd Maste /**
529d30c739cSEd Maste  *	lan78xx_otp_read
530d30c739cSEd Maste  *	@sc: soft context
531d30c739cSEd Maste  *	@off: the otp address offset
532d30c739cSEd Maste  *	@buf: stores the bytes
533d30c739cSEd Maste  *	@buflen: the number of bytes to read
534d30c739cSEd Maste  *
535d30c739cSEd Maste  *	Simply reads bytes from the otp.
536d30c739cSEd Maste  *
537d30c739cSEd Maste  *	LOCKING:
538d30c739cSEd Maste  *	The function takes and releases device lock if it is not already held.
539d30c739cSEd Maste  *
540d30c739cSEd Maste  *	RETURNS:
541d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
542d30c739cSEd Maste  */
543d30c739cSEd Maste static int
lan78xx_otp_read(struct muge_softc * sc,uint16_t off,uint8_t * buf,uint16_t buflen)544d30c739cSEd Maste lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf,
545d30c739cSEd Maste     uint16_t buflen)
546d30c739cSEd Maste {
547d30c739cSEd Maste 	uint8_t sig;
548d30c739cSEd Maste 	int err;
549d30c739cSEd Maste 
550d30c739cSEd Maste 	err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1);
551d30c739cSEd Maste 	if (err == 0) {
552d30c739cSEd Maste 		if (sig == OTP_INDICATOR_1) {
553d30c739cSEd Maste 		} else if (sig == OTP_INDICATOR_2) {
554e5151258SEd Maste 			off += 0x100; /* XXX */
555d30c739cSEd Maste 		} else {
556d30c739cSEd Maste 			err = -EINVAL;
557d30c739cSEd Maste 		}
558d30c739cSEd Maste 		if (!err)
559d30c739cSEd Maste 			err = lan78xx_otp_read_raw(sc, off, buf, buflen);
560d30c739cSEd Maste 	}
561e5151258SEd Maste 	return (err);
562d30c739cSEd Maste }
563d30c739cSEd Maste 
564d30c739cSEd Maste /**
565d30c739cSEd Maste  *	lan78xx_setmacaddress - Set the mac address in the device
566d30c739cSEd Maste  *	@sc: driver soft context
567d30c739cSEd Maste  *	@addr: pointer to array contain at least 6 bytes of the mac
568d30c739cSEd Maste  *
569d30c739cSEd Maste  *	LOCKING:
570d30c739cSEd Maste  *	Should be called with the MUGE lock held.
571d30c739cSEd Maste  *
572d30c739cSEd Maste  *	RETURNS:
573d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
574d30c739cSEd Maste  */
575d30c739cSEd Maste static int
lan78xx_setmacaddress(struct muge_softc * sc,const uint8_t * addr)576d30c739cSEd Maste lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr)
577d30c739cSEd Maste {
578d30c739cSEd Maste 	int err;
579d30c739cSEd Maste 	uint32_t val;
580d30c739cSEd Maste 
581d30c739cSEd Maste 	muge_dbg_printf(sc,
582d30c739cSEd Maste 	    "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n",
583d30c739cSEd Maste 	    addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
584d30c739cSEd Maste 
585d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
586d30c739cSEd Maste 
587d30c739cSEd Maste 	val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
58848bc1758SEd Maste 	if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0)
589d30c739cSEd Maste 		goto done;
590d30c739cSEd Maste 
591d30c739cSEd Maste 	val = (addr[5] << 8) | addr[4];
59248bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val);
593d30c739cSEd Maste 
594d30c739cSEd Maste done:
595d30c739cSEd Maste 	return (err);
596d30c739cSEd Maste }
597d30c739cSEd Maste 
598d30c739cSEd Maste /**
599d30c739cSEd Maste  *	lan78xx_set_rx_max_frame_length
600d30c739cSEd Maste  *	@sc: driver soft context
601d30c739cSEd Maste  *	@size: pointer to array contain at least 6 bytes of the mac
602d30c739cSEd Maste  *
603d30c739cSEd Maste  *	Sets the maximum frame length to be received. Frames bigger than
604d30c739cSEd Maste  *	this size are aborted.
605d30c739cSEd Maste  *
606d30c739cSEd Maste  *	RETURNS:
607d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
608d30c739cSEd Maste  */
609d30c739cSEd Maste static int
lan78xx_set_rx_max_frame_length(struct muge_softc * sc,int size)610d30c739cSEd Maste lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size)
611d30c739cSEd Maste {
612d30c739cSEd Maste 	uint32_t buf;
613d30c739cSEd Maste 	bool rxenabled;
614d30c739cSEd Maste 
615e5151258SEd Maste 	/* First we have to disable rx before changing the length. */
616f7097359SWarner Losh 	lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
61748bc1758SEd Maste 	rxenabled = ((buf & ETH_MAC_RX_EN_) != 0);
618d30c739cSEd Maste 
619d30c739cSEd Maste 	if (rxenabled) {
62048bc1758SEd Maste 		buf &= ~ETH_MAC_RX_EN_;
621f7097359SWarner Losh 		lan78xx_write_reg(sc, ETH_MAC_RX, buf);
622d30c739cSEd Maste 	}
623d30c739cSEd Maste 
624e5151258SEd Maste 	/* Setting max frame length. */
62548bc1758SEd Maste 	buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_;
62648bc1758SEd Maste 	buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) &
62748bc1758SEd Maste 	    ETH_MAC_RX_MAX_FR_SIZE_MASK_);
628f7097359SWarner Losh 	lan78xx_write_reg(sc, ETH_MAC_RX, buf);
629d30c739cSEd Maste 
630d30c739cSEd Maste 	/* If it were enabled before, we enable it back. */
631d30c739cSEd Maste 
632d30c739cSEd Maste 	if (rxenabled) {
63348bc1758SEd Maste 		buf |= ETH_MAC_RX_EN_;
634f7097359SWarner Losh 		lan78xx_write_reg(sc, ETH_MAC_RX, buf);
635d30c739cSEd Maste 	}
636d30c739cSEd Maste 
637e5151258SEd Maste 	return (0);
638d30c739cSEd Maste }
639d30c739cSEd Maste 
640d30c739cSEd Maste /**
641d30c739cSEd Maste  *	lan78xx_miibus_readreg - Read a MII/MDIO register
642d30c739cSEd Maste  *	@dev: usb ether device
643d30c739cSEd Maste  *	@phy: the number of phy reading from
644d30c739cSEd Maste  *	@reg: the register address
645d30c739cSEd Maste  *
646d30c739cSEd Maste  *	LOCKING:
647d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
648d30c739cSEd Maste  *
649d30c739cSEd Maste  *	RETURNS:
650d30c739cSEd Maste  *	Returns the 16-bits read from the MII register, if this function fails
651d30c739cSEd Maste  *	0 is returned.
652d30c739cSEd Maste  */
653d30c739cSEd Maste static int
lan78xx_miibus_readreg(device_t dev,int phy,int reg)6549f6954e5SEd Maste lan78xx_miibus_readreg(device_t dev, int phy, int reg)
6559f6954e5SEd Maste {
656d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
657d30c739cSEd Maste 	uint32_t addr, val;
65815f16425SEd Maste 	bool locked;
659d30c739cSEd Maste 
660d30c739cSEd Maste 	val = 0;
661d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
662d30c739cSEd Maste 	if (!locked)
663d30c739cSEd Maste 		MUGE_LOCK(sc);
664d30c739cSEd Maste 
66548bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
66648bc1758SEd Maste 	    0) {
667d30c739cSEd Maste 		muge_warn_printf(sc, "MII is busy\n");
668d30c739cSEd Maste 		goto done;
669d30c739cSEd Maste 	}
670d30c739cSEd Maste 
67148bc1758SEd Maste 	addr = (phy << 11) | (reg << 6) |
67248bc1758SEd Maste 	    ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_;
67348bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_MII_ACC, addr);
674d30c739cSEd Maste 
67548bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
67648bc1758SEd Maste 	    0) {
677d30c739cSEd Maste 		muge_warn_printf(sc, "MII read timeout\n");
678d30c739cSEd Maste 		goto done;
679d30c739cSEd Maste 	}
680d30c739cSEd Maste 
68148bc1758SEd Maste 	lan78xx_read_reg(sc, ETH_MII_DATA, &val);
682d30c739cSEd Maste 	val = le32toh(val);
683d30c739cSEd Maste 
684d30c739cSEd Maste done:
685d30c739cSEd Maste 	if (!locked)
686d30c739cSEd Maste 		MUGE_UNLOCK(sc);
687d30c739cSEd Maste 
688d30c739cSEd Maste 	return (val & 0xFFFF);
689d30c739cSEd Maste }
690d30c739cSEd Maste 
691d30c739cSEd Maste /**
692d30c739cSEd Maste  *	lan78xx_miibus_writereg - Writes a MII/MDIO register
693d30c739cSEd Maste  *	@dev: usb ether device
694d30c739cSEd Maste  *	@phy: the number of phy writing to
695d30c739cSEd Maste  *	@reg: the register address
696d30c739cSEd Maste  *	@val: the value to write
697d30c739cSEd Maste  *
698d30c739cSEd Maste  *	Attempts to write a PHY register through the usb controller registers.
699d30c739cSEd Maste  *
700d30c739cSEd Maste  *	LOCKING:
701d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
702d30c739cSEd Maste  *
703d30c739cSEd Maste  *	RETURNS:
704d30c739cSEd Maste  *	Always returns 0 regardless of success or failure.
705d30c739cSEd Maste  */
706d30c739cSEd Maste static int
lan78xx_miibus_writereg(device_t dev,int phy,int reg,int val)707d30c739cSEd Maste lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val)
708d30c739cSEd Maste {
709d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
710d30c739cSEd Maste 	uint32_t addr;
71115f16425SEd Maste 	bool locked;
712d30c739cSEd Maste 
713d30c739cSEd Maste 	if (sc->sc_phyno != phy)
714d30c739cSEd Maste 		return (0);
715d30c739cSEd Maste 
716d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
717d30c739cSEd Maste 	if (!locked)
718d30c739cSEd Maste 		MUGE_LOCK(sc);
719d30c739cSEd Maste 
72048bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
72148bc1758SEd Maste 	    0) {
722d30c739cSEd Maste 		muge_warn_printf(sc, "MII is busy\n");
723d30c739cSEd Maste 		goto done;
724d30c739cSEd Maste 	}
725d30c739cSEd Maste 
726d30c739cSEd Maste 	val = htole32(val);
72748bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_MII_DATA, val);
728d30c739cSEd Maste 
729e5151258SEd Maste 	addr = (phy << 11) | (reg << 6) |
730e5151258SEd Maste 	    ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_;
73148bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_MII_ACC, addr);
732d30c739cSEd Maste 
73348bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0)
734d30c739cSEd Maste 		muge_warn_printf(sc, "MII write timeout\n");
735d30c739cSEd Maste 
736d30c739cSEd Maste done:
737d30c739cSEd Maste 	if (!locked)
738d30c739cSEd Maste 		MUGE_UNLOCK(sc);
739d30c739cSEd Maste 	return (0);
740d30c739cSEd Maste }
741d30c739cSEd Maste 
742d30c739cSEd Maste /*
743d30c739cSEd Maste  *	lan78xx_miibus_statchg - Called to detect phy status change
744d30c739cSEd Maste  *	@dev: usb ether device
745d30c739cSEd Maste  *
746d30c739cSEd Maste  *	This function is called periodically by the system to poll for status
747d30c739cSEd Maste  *	changes of the link.
748d30c739cSEd Maste  *
749d30c739cSEd Maste  *	LOCKING:
750d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
751d30c739cSEd Maste  */
752d30c739cSEd Maste static void
lan78xx_miibus_statchg(device_t dev)753d30c739cSEd Maste lan78xx_miibus_statchg(device_t dev)
754d30c739cSEd Maste {
755d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
756d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
757935b194dSJustin Hibbits 	if_t ifp;
758d30c739cSEd Maste 	int err;
759d30c739cSEd Maste 	uint32_t flow = 0;
760d30c739cSEd Maste 	uint32_t fct_flow = 0;
76115f16425SEd Maste 	bool locked;
762d30c739cSEd Maste 
763d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
764d30c739cSEd Maste 	if (!locked)
765d30c739cSEd Maste 		MUGE_LOCK(sc);
766d30c739cSEd Maste 
767d30c739cSEd Maste 	ifp = uether_getifp(&sc->sc_ue);
768d30c739cSEd Maste 	if (mii == NULL || ifp == NULL ||
769935b194dSJustin Hibbits 	    (if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0)
770d30c739cSEd Maste 		goto done;
771d30c739cSEd Maste 
772d30c739cSEd Maste 	/* Use the MII status to determine link status */
773d30c739cSEd Maste 	sc->sc_flags &= ~MUGE_FLAG_LINK;
774d30c739cSEd Maste 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
775d30c739cSEd Maste 	    (IFM_ACTIVE | IFM_AVALID)) {
776d30c739cSEd Maste 		muge_dbg_printf(sc, "media is active\n");
777d30c739cSEd Maste 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
778d30c739cSEd Maste 		case IFM_10_T:
779d30c739cSEd Maste 		case IFM_100_TX:
780d30c739cSEd Maste 			sc->sc_flags |= MUGE_FLAG_LINK;
781d30c739cSEd Maste 			muge_dbg_printf(sc, "10/100 ethernet\n");
782d30c739cSEd Maste 			break;
783d30c739cSEd Maste 		case IFM_1000_T:
784d30c739cSEd Maste 			sc->sc_flags |= MUGE_FLAG_LINK;
785d30c739cSEd Maste 			muge_dbg_printf(sc, "Gigabit ethernet\n");
786d30c739cSEd Maste 			break;
787d30c739cSEd Maste 		default:
788d30c739cSEd Maste 			break;
789d30c739cSEd Maste 		}
790d30c739cSEd Maste 	}
791d30c739cSEd Maste 	/* Lost link, do nothing. */
792d30c739cSEd Maste 	if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
793d30c739cSEd Maste 		muge_dbg_printf(sc, "link flag not set\n");
794d30c739cSEd Maste 		goto done;
795d30c739cSEd Maste 	}
796d30c739cSEd Maste 
79748bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow);
798d30c739cSEd Maste 	if (err) {
799d30c739cSEd Maste 		muge_warn_printf(sc,
800d30c739cSEd Maste 		   "failed to read initial flow control thresholds, error %d\n",
801d30c739cSEd Maste 		    err);
802d30c739cSEd Maste 		goto done;
803d30c739cSEd Maste 	}
804d30c739cSEd Maste 
805e5151258SEd Maste 	/* Enable/disable full duplex operation and TX/RX pause. */
806d30c739cSEd Maste 	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
807d30c739cSEd Maste 		muge_dbg_printf(sc, "full duplex operation\n");
808d30c739cSEd Maste 
809e5151258SEd Maste 		/* Enable transmit MAC flow control function. */
810d30c739cSEd Maste 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
81148bc1758SEd Maste 			flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF;
812d30c739cSEd Maste 
813d30c739cSEd Maste 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
81448bc1758SEd Maste 			flow |= ETH_FLOW_CR_RX_FCEN_;
815d30c739cSEd Maste 	}
816d30c739cSEd Maste 
817e5151258SEd Maste 	/* XXX Flow control settings obtained from Microchip's driver. */
818d30c739cSEd Maste 	switch(usbd_get_speed(sc->sc_ue.ue_udev)) {
819d30c739cSEd Maste 	case USB_SPEED_SUPER:
820e5151258SEd Maste 		fct_flow = 0x817;
821d30c739cSEd Maste 		break;
822d30c739cSEd Maste 	case USB_SPEED_HIGH:
823e5151258SEd Maste 		fct_flow = 0x211;
824d30c739cSEd Maste 		break;
825d30c739cSEd Maste 	default:
826d30c739cSEd Maste 		break;
827d30c739cSEd Maste 	}
828d30c739cSEd Maste 
82948bc1758SEd Maste 	err += lan78xx_write_reg(sc, ETH_FLOW, flow);
83048bc1758SEd Maste 	err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow);
831d30c739cSEd Maste 	if (err)
832d30c739cSEd Maste 		muge_warn_printf(sc, "media change failed, error %d\n", err);
833d30c739cSEd Maste 
834d30c739cSEd Maste done:
835d30c739cSEd Maste 	if (!locked)
836d30c739cSEd Maste 		MUGE_UNLOCK(sc);
837d30c739cSEd Maste }
838d30c739cSEd Maste 
839d30c739cSEd Maste /*
840d30c739cSEd Maste  *	lan78xx_set_mdix_auto - Configure the device to enable automatic
841d30c739cSEd Maste  *	crossover and polarity detection.  LAN7800 provides HP Auto-MDIX
842d30c739cSEd Maste  *	functionality for seamless crossover and polarity detection.
843d30c739cSEd Maste  *
844d30c739cSEd Maste  *	@sc: driver soft context
845d30c739cSEd Maste  *
846d30c739cSEd Maste  *	LOCKING:
847d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
848d30c739cSEd Maste  */
849d30c739cSEd Maste static void
lan78xx_set_mdix_auto(struct muge_softc * sc)850d30c739cSEd Maste lan78xx_set_mdix_auto(struct muge_softc *sc)
851d30c739cSEd Maste {
852d30c739cSEd Maste 	uint32_t buf, err;
853d30c739cSEd Maste 
854d30c739cSEd Maste 	err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
855d30c739cSEd Maste 	    MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1);
856d30c739cSEd Maste 
857d30c739cSEd Maste 	buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
858d30c739cSEd Maste 	    MUGE_EXT_MODE_CTRL);
859d30c739cSEd Maste 	buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_;
860d30c739cSEd Maste 	buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_;
861d30c739cSEd Maste 
862d30c739cSEd Maste 	lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
863d30c739cSEd Maste 	err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
864d30c739cSEd Maste 	    MUGE_EXT_MODE_CTRL, buf);
865d30c739cSEd Maste 
866d30c739cSEd Maste 	err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
867d30c739cSEd Maste 	    MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0);
868d30c739cSEd Maste 
869d30c739cSEd Maste 	if (err != 0)
870d30c739cSEd Maste 		muge_warn_printf(sc, "error setting PHY's MDIX status\n");
871d30c739cSEd Maste 
872d30c739cSEd Maste 	sc->sc_mdix_ctl = buf;
873d30c739cSEd Maste }
874d30c739cSEd Maste 
875d30c739cSEd Maste /**
876d30c739cSEd Maste  *	lan78xx_phy_init - Initialises the in-built MUGE phy
877d30c739cSEd Maste  *	@sc: driver soft context
878d30c739cSEd Maste  *
879d30c739cSEd Maste  *	Resets the PHY part of the chip and then initialises it to default
880d30c739cSEd Maste  *	values.  The 'link down' and 'auto-negotiation complete' interrupts
881d30c739cSEd Maste  *	from the PHY are also enabled, however we don't monitor the interrupt
882d30c739cSEd Maste  *	endpoints for the moment.
883d30c739cSEd Maste  *
884d30c739cSEd Maste  *	RETURNS:
885d30c739cSEd Maste  *	Returns 0 on success or EIO if failed to reset the PHY.
886d30c739cSEd Maste  */
887d30c739cSEd Maste static int
lan78xx_phy_init(struct muge_softc * sc)888d30c739cSEd Maste lan78xx_phy_init(struct muge_softc *sc)
889d30c739cSEd Maste {
890d30c739cSEd Maste 	muge_dbg_printf(sc, "Initializing PHY.\n");
89103dec173SEd Maste 	uint16_t bmcr, lmsr;
892d30c739cSEd Maste 	usb_ticks_t start_ticks;
89360ce15edSEd Maste 	uint32_t hw_reg;
894d30c739cSEd Maste 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
895d30c739cSEd Maste 
896d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
897d30c739cSEd Maste 
898e5151258SEd Maste 	/* Reset phy and wait for reset to complete. */
899d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR,
900d30c739cSEd Maste 	    BMCR_RESET);
901d30c739cSEd Maste 
902d30c739cSEd Maste 	start_ticks = ticks;
903d30c739cSEd Maste 	do {
904d30c739cSEd Maste 		uether_pause(&sc->sc_ue, hz / 100);
905d30c739cSEd Maste 		bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
906d30c739cSEd Maste 		    MII_BMCR);
907d30c739cSEd Maste 	} while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
908d30c739cSEd Maste 
909d30c739cSEd Maste 	if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) {
910d30c739cSEd Maste 		muge_err_printf(sc, "PHY reset timed-out\n");
911d30c739cSEd Maste 		return (EIO);
912d30c739cSEd Maste 	}
913d30c739cSEd Maste 
914d30c739cSEd Maste 	/* Setup phy to interrupt upon link down or autoneg completion. */
915d30c739cSEd Maste 	lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
916d30c739cSEd Maste 	    MUGE_PHY_INTR_STAT);
917d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
918d30c739cSEd Maste 	    MUGE_PHY_INTR_MASK,
919d30c739cSEd Maste 	    (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE));
920d30c739cSEd Maste 
921d30c739cSEd Maste 	/* Enable Auto-MDIX for crossover and polarity detection. */
922d30c739cSEd Maste 	lan78xx_set_mdix_auto(sc);
923d30c739cSEd Maste 
924d30c739cSEd Maste 	/* Enable all modes. */
925d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR,
926d30c739cSEd Maste 	    ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD |
927d30c739cSEd Maste 	    ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM);
928d30c739cSEd Maste 
929c8c1c23aSGordon Bergling 	/* Restart auto-negotiation. */
930d30c739cSEd Maste 	bmcr |= BMCR_STARTNEG;
931d30c739cSEd Maste 	bmcr |= BMCR_AUTOEN;
932d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);
933d30c739cSEd Maste 	bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
93460ce15edSEd Maste 
93503dec173SEd Maste 	/* Configure LED Modes. */
9362c597054SIan Lepore 	if (sc->sc_led_modes_mask != 0) {
93703dec173SEd Maste 		lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
93803dec173SEd Maste 		    MUGE_PHY_LED_MODE);
9392c597054SIan Lepore 		lmsr &= ~sc->sc_led_modes_mask;
94003dec173SEd Maste 		lmsr |= sc->sc_led_modes;
94103dec173SEd Maste 		lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
94203dec173SEd Maste 		    MUGE_PHY_LED_MODE, lmsr);
94303dec173SEd Maste 	}
94403dec173SEd Maste 
94560ce15edSEd Maste 	/* Enable appropriate LEDs. */
94660ce15edSEd Maste 	if (sc->sc_leds != 0 &&
94760ce15edSEd Maste 	    lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) {
94860ce15edSEd Maste 		hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ |
94960ce15edSEd Maste 			    ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ );
95060ce15edSEd Maste 		hw_reg |= sc->sc_leds;
95160ce15edSEd Maste 		lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg);
95260ce15edSEd Maste 	}
953d30c739cSEd Maste 	return (0);
954d30c739cSEd Maste }
955d30c739cSEd Maste 
956d30c739cSEd Maste /**
957d30c739cSEd Maste  *	lan78xx_chip_init - Initialises the chip after power on
958d30c739cSEd Maste  *	@sc: driver soft context
959d30c739cSEd Maste  *
960d30c739cSEd Maste  *	This initialisation sequence is modelled on the procedure in the Linux
961d30c739cSEd Maste  *	driver.
962d30c739cSEd Maste  *
963d30c739cSEd Maste  *	RETURNS:
964d30c739cSEd Maste  *	Returns 0 on success or an error code on failure.
965d30c739cSEd Maste  */
966d30c739cSEd Maste static int
lan78xx_chip_init(struct muge_softc * sc)967d30c739cSEd Maste lan78xx_chip_init(struct muge_softc *sc)
968d30c739cSEd Maste {
969d30c739cSEd Maste 	int err;
970d30c739cSEd Maste 	uint32_t buf;
971d30c739cSEd Maste 	uint32_t burst_cap;
972d30c739cSEd Maste 
973097f721bSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
974d30c739cSEd Maste 
975e5151258SEd Maste 	/* Enter H/W config mode. */
97648bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_);
977d30c739cSEd Maste 
97848bc1758SEd Maste 	if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) !=
97948bc1758SEd Maste 	    0) {
980d30c739cSEd Maste 		muge_warn_printf(sc,
981d30c739cSEd Maste 		    "timed-out waiting for lite reset to complete\n");
982d30c739cSEd Maste 		goto init_failed;
983d30c739cSEd Maste 	}
984d30c739cSEd Maste 
985e5151258SEd Maste 	/* Set the mac address. */
986d30c739cSEd Maste 	if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) {
987d30c739cSEd Maste 		muge_warn_printf(sc, "failed to set the MAC address\n");
988d30c739cSEd Maste 		goto init_failed;
989d30c739cSEd Maste 	}
990d30c739cSEd Maste 
991e5151258SEd Maste 	/* Read and display the revision register. */
99203ba5353SEd Maste 	if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) {
99348bc1758SEd Maste 		muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n",
99448bc1758SEd Maste 		    err);
995d30c739cSEd Maste 		goto init_failed;
996d30c739cSEd Maste 	}
99703ba5353SEd Maste 	sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16;
99803ba5353SEd Maste 	sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_;
9992d14fb8bSEd Maste 	switch (sc->chipid) {
10002d14fb8bSEd Maste 	case ETH_ID_REV_CHIP_ID_7800_:
10012d14fb8bSEd Maste 	case ETH_ID_REV_CHIP_ID_7850_:
10022d14fb8bSEd Maste 		break;
10032d14fb8bSEd Maste 	default:
100403ba5353SEd Maste 		muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n",
100503ba5353SEd Maste 		    sc->chipid);
100603ba5353SEd Maste 		goto init_failed;
100703ba5353SEd Maste 	}
100803ba5353SEd Maste 	device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid,
100903ba5353SEd Maste 	    sc->chiprev);
1010d30c739cSEd Maste 
1011d30c739cSEd Maste 	/* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */
101248bc1758SEd Maste 	if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) {
101348bc1758SEd Maste 		muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err);
1014d30c739cSEd Maste 		goto init_failed;
1015d30c739cSEd Maste 	}
101648bc1758SEd Maste 	buf |= ETH_USB_CFG_BIR_;
101748bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
1018d30c739cSEd Maste 
1019d30c739cSEd Maste 	/*
1020e5151258SEd Maste 	 * XXX LTM support will go here.
1021d30c739cSEd Maste 	 */
1022d30c739cSEd Maste 
1023d30c739cSEd Maste 	/* Configuring the burst cap. */
1024d30c739cSEd Maste 	switch (usbd_get_speed(sc->sc_ue.ue_udev)) {
1025d30c739cSEd Maste 	case USB_SPEED_SUPER:
1026d30c739cSEd Maste 		burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE;
1027d30c739cSEd Maste 		break;
1028d30c739cSEd Maste 	case USB_SPEED_HIGH:
1029d30c739cSEd Maste 		burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE;
1030d30c739cSEd Maste 		break;
1031d30c739cSEd Maste 	default:
1032d30c739cSEd Maste 		burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE;
1033d30c739cSEd Maste 	}
1034d30c739cSEd Maste 
103548bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap);
1036d30c739cSEd Maste 
1037e5151258SEd Maste 	/* Set the default bulk in delay (same value from Linux driver). */
103848bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY);
1039d30c739cSEd Maste 
1040e5151258SEd Maste 	/* Multiple ethernet frames per USB packets. */
104148bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf);
104248bc1758SEd Maste 	buf |= ETH_HW_CFG_MEF_;
104348bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_HW_CFG, buf);
1044d30c739cSEd Maste 
1045d30c739cSEd Maste 	/* Enable burst cap. */
104648bc1758SEd Maste 	if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) {
104748bc1758SEd Maste 		muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n",
1048d30c739cSEd Maste 		    err);
1049d30c739cSEd Maste 		goto init_failed;
1050d30c739cSEd Maste 	}
105148bc1758SEd Maste 	buf |= ETH_USB_CFG_BCE_;
105248bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
1053d30c739cSEd Maste 
1054d30c739cSEd Maste 	/*
1055d30c739cSEd Maste 	 * Set FCL's RX and TX FIFO sizes: according to data sheet this is
1056d30c739cSEd Maste 	 * already the default value. But we initialize it to the same value
1057d30c739cSEd Maste 	 * anyways, as that's what the Linux driver does.
1058d30c739cSEd Maste 	 *
1059d30c739cSEd Maste 	 */
1060d30c739cSEd Maste 	buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512;
106148bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf);
1062d30c739cSEd Maste 
1063d30c739cSEd Maste 	buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512;
106448bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf);
1065d30c739cSEd Maste 
1066d30c739cSEd Maste 	/* Enabling interrupts. (Not using them for now) */
106748bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_);
1068d30c739cSEd Maste 
1069d30c739cSEd Maste 	/*
1070d30c739cSEd Maste 	 * Initializing flow control registers to 0.  These registers are
1071d30c739cSEd Maste 	 * properly set is handled in link-reset function in the Linux driver.
1072d30c739cSEd Maste 	 */
107348bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FLOW, 0);
107448bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0);
1075d30c739cSEd Maste 
1076d30c739cSEd Maste 	/*
1077d30c739cSEd Maste 	 * Settings for the RFE, we enable broadcast and destination address
1078d30c739cSEd Maste 	 * perfect filtering.
1079d30c739cSEd Maste 	 */
108048bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf);
108148bc1758SEd Maste 	buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_;
108248bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf);
1083d30c739cSEd Maste 
1084d30c739cSEd Maste 	/*
1085d30c739cSEd Maste 	 * At this point the Linux driver writes multicast tables, and enables
1086d30c739cSEd Maste 	 * checksum engines. But in FreeBSD that gets done in muge_init,
1087d30c739cSEd Maste 	 * which gets called when the interface is brought up.
1088d30c739cSEd Maste 	 */
1089d30c739cSEd Maste 
1090d30c739cSEd Maste 	/* Reset the PHY. */
109148bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_);
109248bc1758SEd Maste 	if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL,
109348bc1758SEd Maste 	    ETH_PMT_CTL_PHY_RST_)) != 0) {
1094d30c739cSEd Maste 		muge_warn_printf(sc,
1095d30c739cSEd Maste 		    "timed-out waiting for phy reset to complete\n");
1096d30c739cSEd Maste 		goto init_failed;
1097d30c739cSEd Maste 	}
1098d30c739cSEd Maste 
109948bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf);
11002d14fb8bSEd Maste 	if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ &&
11012d14fb8bSEd Maste 	    !lan78xx_eeprom_present(sc)) {
11022d14fb8bSEd Maste 		/* Set automatic duplex and speed on LAN7800 without EEPROM. */
110348bc1758SEd Maste 		buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_;
11042d14fb8bSEd Maste 	}
110548bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_CR, buf);
1106d30c739cSEd Maste 
1107d30c739cSEd Maste 	/*
1108d30c739cSEd Maste 	 * Enable PHY interrupts (Not really getting used for now)
110948bc1758SEd Maste 	 * ETH_INT_EP_CTL: interrupt endpoint control register
1110d30c739cSEd Maste 	 * phy events cause interrupts to be issued
1111d30c739cSEd Maste 	 */
111248bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf);
111348bc1758SEd Maste 	buf |= ETH_INT_ENP_PHY_INT;
111448bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf);
1115d30c739cSEd Maste 
1116d30c739cSEd Maste 	/*
1117d30c739cSEd Maste 	 * Enables mac's transmitter.  It will transmit frames from the buffer
1118d30c739cSEd Maste 	 * onto the cable.
1119d30c739cSEd Maste 	 */
112048bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf);
112148bc1758SEd Maste 	buf |= ETH_MAC_TX_TXEN_;
112248bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_TX, buf);
1123d30c739cSEd Maste 
1124e5151258SEd Maste 	/* FIFO is capable of transmitting frames to MAC. */
112548bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf);
112648bc1758SEd Maste 	buf |= ETH_FCT_TX_CTL_EN_;
112748bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf);
1128d30c739cSEd Maste 
1129d30c739cSEd Maste 	/*
1130d30c739cSEd Maste 	 * Set max frame length.  In linux this is dev->mtu (which by default
1131e5151258SEd Maste 	 * is 1500) + VLAN_ETH_HLEN = 1518.
1132d30c739cSEd Maste 	 */
1133d30c739cSEd Maste 	err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN);
1134d30c739cSEd Maste 
1135e5151258SEd Maste 	/* Initialise the PHY. */
1136d30c739cSEd Maste 	if ((err = lan78xx_phy_init(sc)) != 0)
1137d30c739cSEd Maste 		goto init_failed;
1138d30c739cSEd Maste 
1139e5151258SEd Maste 	/* Enable MAC RX. */
114048bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
114148bc1758SEd Maste 	buf |= ETH_MAC_RX_EN_;
114248bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
1143d30c739cSEd Maste 
1144e5151258SEd Maste 	/* Enable FIFO controller RX. */
114548bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf);
114648bc1758SEd Maste 	buf |= ETH_FCT_TX_CTL_EN_;
114748bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf);
1148d30c739cSEd Maste 
114949b2a5feSEd Maste 	sc->sc_flags |= MUGE_FLAG_INIT_DONE;
1150e5151258SEd Maste 	return (0);
1151d30c739cSEd Maste 
1152d30c739cSEd Maste init_failed:
1153d30c739cSEd Maste 	muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err);
1154d30c739cSEd Maste 	return (err);
1155d30c739cSEd Maste }
1156d30c739cSEd Maste 
1157d30c739cSEd Maste static void
muge_bulk_read_callback(struct usb_xfer * xfer,usb_error_t error)1158d30c739cSEd Maste muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
1159d30c739cSEd Maste {
1160d30c739cSEd Maste 	struct muge_softc *sc = usbd_xfer_softc(xfer);
1161d30c739cSEd Maste 	struct usb_ether *ue = &sc->sc_ue;
1162935b194dSJustin Hibbits 	if_t ifp = uether_getifp(ue);
1163d30c739cSEd Maste 	struct mbuf *m;
1164d30c739cSEd Maste 	struct usb_page_cache *pc;
1165d30c739cSEd Maste 	uint32_t rx_cmd_a, rx_cmd_b;
1166d30c739cSEd Maste 	uint16_t rx_cmd_c;
11679c847ffdSHans Petter Selasky 	int pktlen;
1168d30c739cSEd Maste 	int off;
1169d30c739cSEd Maste 	int actlen;
1170d30c739cSEd Maste 
1171d30c739cSEd Maste 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
1172d30c739cSEd Maste 	muge_dbg_printf(sc, "rx : actlen %d\n", actlen);
1173d30c739cSEd Maste 
1174d30c739cSEd Maste 	switch (USB_GET_STATE(xfer)) {
1175d30c739cSEd Maste 	case USB_ST_TRANSFERRED:
1176d30c739cSEd Maste 		/*
1177d30c739cSEd Maste 		 * There is always a zero length frame after bringing the
1178d30c739cSEd Maste 		 * interface up.
1179d30c739cSEd Maste 		 */
1180d30c739cSEd Maste 		if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN))
1181d30c739cSEd Maste 			goto tr_setup;
1182d30c739cSEd Maste 
1183d30c739cSEd Maste 		/*
1184d30c739cSEd Maste 		 * There may be multiple packets in the USB frame.  Each will
1185d30c739cSEd Maste 		 * have a header and each needs to have its own mbuf allocated
1186d30c739cSEd Maste 		 * and populated for it.
1187d30c739cSEd Maste 		 */
1188d30c739cSEd Maste 		pc = usbd_xfer_get_frame(xfer, 0);
1189d30c739cSEd Maste 		off = 0;
1190d30c739cSEd Maste 
1191d30c739cSEd Maste 		while (off < actlen) {
1192d30c739cSEd Maste 			/* The frame header is aligned on a 4 byte boundary. */
1193d30c739cSEd Maste 			off = ((off + 0x3) & ~0x3);
1194d30c739cSEd Maste 
1195d30c739cSEd Maste 			/* Extract RX CMD A. */
1196d30c739cSEd Maste 			if (off + sizeof(rx_cmd_a) > actlen)
1197d30c739cSEd Maste 				goto tr_setup;
1198d30c739cSEd Maste 			usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a));
1199d30c739cSEd Maste 			off += (sizeof(rx_cmd_a));
1200d30c739cSEd Maste 			rx_cmd_a = le32toh(rx_cmd_a);
1201d30c739cSEd Maste 
1202d30c739cSEd Maste 			/* Extract RX CMD B. */
1203d30c739cSEd Maste 			if (off + sizeof(rx_cmd_b) > actlen)
1204d30c739cSEd Maste 				goto tr_setup;
1205d30c739cSEd Maste 			usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b));
1206d30c739cSEd Maste 			off += (sizeof(rx_cmd_b));
1207d30c739cSEd Maste 			rx_cmd_b = le32toh(rx_cmd_b);
1208d30c739cSEd Maste 
1209d30c739cSEd Maste 			/* Extract RX CMD C. */
1210d30c739cSEd Maste 			if (off + sizeof(rx_cmd_c) > actlen)
1211d30c739cSEd Maste 				goto tr_setup;
1212d30c739cSEd Maste 			usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c));
1213d30c739cSEd Maste 			off += (sizeof(rx_cmd_c));
1214a99020fbSKevin Lo 			rx_cmd_c = le16toh(rx_cmd_c);
1215d30c739cSEd Maste 
1216d30c739cSEd Maste 			if (off > actlen)
1217d30c739cSEd Maste 				goto tr_setup;
1218d30c739cSEd Maste 
1219d30c739cSEd Maste 			pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
1220d30c739cSEd Maste 
1221d30c739cSEd Maste 			muge_dbg_printf(sc,
1222d30c739cSEd Maste 			    "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x "
1223d30c739cSEd Maste 			    " pktlen %d actlen %d off %d\n",
1224d30c739cSEd Maste 			    rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off);
1225d30c739cSEd Maste 
1226d30c739cSEd Maste 			if (rx_cmd_a & RX_CMD_A_RED_) {
1227d30c739cSEd Maste 				muge_dbg_printf(sc,
1228d30c739cSEd Maste 				     "rx error (hdr 0x%08x)\n", rx_cmd_a);
1229d30c739cSEd Maste 				if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1230d30c739cSEd Maste 			} else {
1231d30c739cSEd Maste 				/* Ethernet frame too big or too small? */
1232d30c739cSEd Maste 				if ((pktlen < ETHER_HDR_LEN) ||
1233d30c739cSEd Maste 				    (pktlen > (actlen - off)))
1234d30c739cSEd Maste 					goto tr_setup;
1235d30c739cSEd Maste 
1236e5151258SEd Maste 				/* Create a new mbuf to store the packet. */
1237d30c739cSEd Maste 				m = uether_newbuf();
1238d30c739cSEd Maste 				if (m == NULL) {
1239d30c739cSEd Maste 					muge_warn_printf(sc,
1240d30c739cSEd Maste 					    "failed to create new mbuf\n");
1241d30c739cSEd Maste 					if_inc_counter(ifp, IFCOUNTER_IQDROPS,
1242d30c739cSEd Maste 					    1);
1243d30c739cSEd Maste 					goto tr_setup;
1244d30c739cSEd Maste 				}
12459c847ffdSHans Petter Selasky 				if (pktlen > m->m_len) {
12469c847ffdSHans Petter Selasky 					muge_dbg_printf(sc,
12479c847ffdSHans Petter Selasky 					    "buffer too small %d vs %d bytes",
12489c847ffdSHans Petter Selasky 					    pktlen, m->m_len);
12499c847ffdSHans Petter Selasky 					if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
12509c847ffdSHans Petter Selasky 					m_freem(m);
12519c847ffdSHans Petter Selasky 					goto tr_setup;
12529c847ffdSHans Petter Selasky 				}
1253d30c739cSEd Maste 				usbd_copy_out(pc, off, mtod(m, uint8_t *),
1254d30c739cSEd Maste 				    pktlen);
1255d30c739cSEd Maste 
1256d30c739cSEd Maste 				/*
1257d30c739cSEd Maste 				 * Check if RX checksums are computed, and
1258d30c739cSEd Maste 				 * offload them
1259d30c739cSEd Maste 				 */
1260935b194dSJustin Hibbits 				if ((if_getcapenable(ifp) & IFCAP_RXCSUM) &&
1261d30c739cSEd Maste 				    !(rx_cmd_a & RX_CMD_A_ICSM_)) {
1262d30c739cSEd Maste 					/*
1263d30c739cSEd Maste 					 * Remove the extra 2 bytes of the csum
1264d30c739cSEd Maste 					 *
1265d30c739cSEd Maste 					 * The checksum appears to be
1266d30c739cSEd Maste 					 * simplistically calculated over the
1267d30c739cSEd Maste 					 * protocol headers up to the end of the
1268d30c739cSEd Maste 					 * eth frame.  Which means if the eth
1269d30c739cSEd Maste 					 * frame is padded the csum calculation
1270d30c739cSEd Maste 					 * is incorrectly performed over the
1271d30c739cSEd Maste 					 * padding bytes as well.  Therefore to
1272d30c739cSEd Maste 					 * be safe we ignore the H/W csum on
1273d30c739cSEd Maste 					 * frames less than or equal to
1274d30c739cSEd Maste 					 * 64 bytes.
1275d30c739cSEd Maste 					 *
1276d30c739cSEd Maste 					 * Protocols checksummed:
1277d30c739cSEd Maste 					 * TCP, UDP, ICMP, IGMP, IP
1278d30c739cSEd Maste 					 */
1279d30c739cSEd Maste 					if (pktlen > ETHER_MIN_LEN) {
1280d30c739cSEd Maste 						m->m_pkthdr.csum_flags |=
1281bec8faadSEd Maste 						    CSUM_DATA_VALID |
1282bec8faadSEd Maste 						    CSUM_PSEUDO_HDR;
1283d30c739cSEd Maste 
1284d30c739cSEd Maste 						/*
1285d30c739cSEd Maste 						 * Copy the checksum from the
1286d30c739cSEd Maste 						 * last 2 bytes of the transfer
1287d30c739cSEd Maste 						 * and put in the csum_data
1288d30c739cSEd Maste 						 * field.
1289d30c739cSEd Maste 						 */
1290d30c739cSEd Maste 						usbd_copy_out(pc,
1291d30c739cSEd Maste 						    (off + pktlen),
1292d30c739cSEd Maste 						    &m->m_pkthdr.csum_data, 2);
1293d30c739cSEd Maste 
1294d30c739cSEd Maste 						/*
1295d30c739cSEd Maste 						 * The data is copied in network
1296d30c739cSEd Maste 						 * order, but the csum algorithm
1297d30c739cSEd Maste 						 * in the kernel expects it to
1298d30c739cSEd Maste 						 * be in host network order.
1299d30c739cSEd Maste 						 */
1300d30c739cSEd Maste 						m->m_pkthdr.csum_data =
1301bec8faadSEd Maste 						    ntohs(0xffff);
1302d30c739cSEd Maste 
1303d30c739cSEd Maste 						muge_dbg_printf(sc,
1304d30c739cSEd Maste 						    "RX checksum offloaded (0x%04x)\n",
1305d30c739cSEd Maste 						    m->m_pkthdr.csum_data);
1306d30c739cSEd Maste 					}
1307d30c739cSEd Maste 				}
1308d30c739cSEd Maste 
1309d30c739cSEd Maste 				/* Enqueue the mbuf on the receive queue. */
1310d30c739cSEd Maste 				if (pktlen < (4 + ETHER_HDR_LEN)) {
1311d30c739cSEd Maste 					m_freem(m);
1312d30c739cSEd Maste 					goto tr_setup;
1313d30c739cSEd Maste 				}
1314d30c739cSEd Maste 				/* Remove 4 trailing bytes */
1315d30c739cSEd Maste 				uether_rxmbuf(ue, m, pktlen - 4);
1316d30c739cSEd Maste 			}
1317d30c739cSEd Maste 
1318d30c739cSEd Maste 			/*
1319d30c739cSEd Maste 			 * Update the offset to move to the next potential
1320d30c739cSEd Maste 			 * packet.
1321d30c739cSEd Maste 			 */
1322d30c739cSEd Maste 			off += pktlen;
1323d30c739cSEd Maste 		}
1324d30c739cSEd Maste 		/* FALLTHROUGH */
1325d30c739cSEd Maste 	case USB_ST_SETUP:
1326d30c739cSEd Maste tr_setup:
1327d30c739cSEd Maste 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
1328d30c739cSEd Maste 		usbd_transfer_submit(xfer);
1329d30c739cSEd Maste 		uether_rxflush(ue);
1330d30c739cSEd Maste 		return;
1331d30c739cSEd Maste 	default:
1332d30c739cSEd Maste 		if (error != USB_ERR_CANCELLED) {
1333d30c739cSEd Maste 			muge_warn_printf(sc, "bulk read error, %s\n",
1334d30c739cSEd Maste 			    usbd_errstr(error));
1335d30c739cSEd Maste 			usbd_xfer_set_stall(xfer);
1336d30c739cSEd Maste 			goto tr_setup;
1337d30c739cSEd Maste 		}
1338d30c739cSEd Maste 		return;
1339d30c739cSEd Maste 	}
1340d30c739cSEd Maste }
1341d30c739cSEd Maste 
1342d30c739cSEd Maste /**
1343d30c739cSEd Maste  *	muge_bulk_write_callback - Write callback used to send ethernet frame(s)
1344d30c739cSEd Maste  *	@xfer: the USB transfer
1345d30c739cSEd Maste  *	@error: error code if the transfers is in an errored state
1346d30c739cSEd Maste  *
1347d30c739cSEd Maste  *	The main write function that pulls ethernet frames off the queue and
1348d30c739cSEd Maste  *	sends them out.
1349d30c739cSEd Maste  *
1350d30c739cSEd Maste  */
1351d30c739cSEd Maste static void
muge_bulk_write_callback(struct usb_xfer * xfer,usb_error_t error)1352d30c739cSEd Maste muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
1353d30c739cSEd Maste {
1354d30c739cSEd Maste 	struct muge_softc *sc = usbd_xfer_softc(xfer);
1355935b194dSJustin Hibbits 	if_t ifp = uether_getifp(&sc->sc_ue);
1356d30c739cSEd Maste 	struct usb_page_cache *pc;
1357d30c739cSEd Maste 	struct mbuf *m;
1358d30c739cSEd Maste 	int nframes;
1359d30c739cSEd Maste 	uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0;
1360d30c739cSEd Maste 
1361d30c739cSEd Maste 	switch (USB_GET_STATE(xfer)) {
1362d30c739cSEd Maste 	case USB_ST_TRANSFERRED:
1363d30c739cSEd Maste 		muge_dbg_printf(sc,
1364d30c739cSEd Maste 		    "USB TRANSFER status: USB_ST_TRANSFERRED\n");
1365935b194dSJustin Hibbits 		if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE);
1366d30c739cSEd Maste 		/* FALLTHROUGH */
1367d30c739cSEd Maste 	case USB_ST_SETUP:
1368d30c739cSEd Maste 		muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n");
1369d30c739cSEd Maste tr_setup:
1370d30c739cSEd Maste 		if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 ||
1371935b194dSJustin Hibbits 		    (if_getdrvflags(ifp) & IFF_DRV_OACTIVE) != 0) {
1372d30c739cSEd Maste 			muge_dbg_printf(sc,
1373d30c739cSEd Maste 			    "sc->sc_flags & MUGE_FLAG_LINK: %d\n",
1374d30c739cSEd Maste 			    (sc->sc_flags & MUGE_FLAG_LINK));
1375d30c739cSEd Maste 			muge_dbg_printf(sc,
1376935b194dSJustin Hibbits 			    "if_getdrvflags(ifp) & IFF_DRV_OACTIVE: %d",
1377935b194dSJustin Hibbits 			    (if_getdrvflags(ifp) & IFF_DRV_OACTIVE));
1378d30c739cSEd Maste 			muge_dbg_printf(sc,
1379d30c739cSEd Maste 			    "USB TRANSFER not sending: no link or controller is busy \n");
1380d30c739cSEd Maste 			/*
1381d30c739cSEd Maste 			 * Don't send anything if there is no link or
1382d30c739cSEd Maste 			 * controller is busy.
1383d30c739cSEd Maste 			 */
1384d30c739cSEd Maste 			return;
1385d30c739cSEd Maste 		}
13869f6954e5SEd Maste 		for (nframes = 0;
1387935b194dSJustin Hibbits 		     nframes < 16 && !if_sendq_empty(ifp);
13889f6954e5SEd Maste 		     nframes++) {
1389935b194dSJustin Hibbits 			m = if_dequeue(ifp);
1390d30c739cSEd Maste 			if (m == NULL)
1391d30c739cSEd Maste 				break;
1392d30c739cSEd Maste 			usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
1393d30c739cSEd Maste 				nframes);
1394d30c739cSEd Maste 			frm_len = 0;
1395d30c739cSEd Maste 			pc = usbd_xfer_get_frame(xfer, nframes);
1396d30c739cSEd Maste 
1397d30c739cSEd Maste 			/*
1398d30c739cSEd Maste 			 * Each frame is prefixed with two 32-bit values
1399d30c739cSEd Maste 			 * describing the length of the packet and buffer.
1400d30c739cSEd Maste 			 */
1401d30c739cSEd Maste 			tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) |
1402d30c739cSEd Maste 			     TX_CMD_A_FCS_;
1403d30c739cSEd Maste 			tx_cmd_a = htole32(tx_cmd_a);
1404d30c739cSEd Maste 			usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a));
1405d30c739cSEd Maste 
1406d30c739cSEd Maste 			tx_cmd_b = 0;
1407d30c739cSEd Maste 
1408d30c739cSEd Maste 			/* TCP LSO Support will probably be implemented here. */
1409d30c739cSEd Maste 			tx_cmd_b = htole32(tx_cmd_b);
1410d30c739cSEd Maste 			usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b));
1411d30c739cSEd Maste 
1412d30c739cSEd Maste 			frm_len += 8;
1413d30c739cSEd Maste 
1414d30c739cSEd Maste 			/* Next copy in the actual packet */
1415d30c739cSEd Maste 			usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
1416d30c739cSEd Maste 			frm_len += m->m_pkthdr.len;
1417d30c739cSEd Maste 
1418d30c739cSEd Maste 			if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1419d30c739cSEd Maste 
1420d30c739cSEd Maste 			/*
1421d30c739cSEd Maste 			 * If there's a BPF listener, bounce a copy of this
1422d30c739cSEd Maste 			 * frame to it.
1423d30c739cSEd Maste 			 */
1424d30c739cSEd Maste 			BPF_MTAP(ifp, m);
1425d30c739cSEd Maste 			m_freem(m);
1426d30c739cSEd Maste 
1427d30c739cSEd Maste 			/* Set frame length. */
1428d30c739cSEd Maste 			usbd_xfer_set_frame_len(xfer, nframes, frm_len);
1429d30c739cSEd Maste 		}
1430d30c739cSEd Maste 
1431d30c739cSEd Maste 		muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes);
1432d30c739cSEd Maste 		if (nframes != 0) {
1433d30c739cSEd Maste 			muge_dbg_printf(sc, "USB TRANSFER submit attempt\n");
1434d30c739cSEd Maste 			usbd_xfer_set_frames(xfer, nframes);
1435d30c739cSEd Maste 			usbd_transfer_submit(xfer);
1436935b194dSJustin Hibbits 			if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, 0);
1437d30c739cSEd Maste 		}
1438d30c739cSEd Maste 		return;
1439d30c739cSEd Maste 
1440d30c739cSEd Maste 	default:
1441d30c739cSEd Maste 		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1442935b194dSJustin Hibbits 		if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE);
1443d30c739cSEd Maste 
1444d30c739cSEd Maste 		if (error != USB_ERR_CANCELLED) {
1445d30c739cSEd Maste 			muge_err_printf(sc,
1446d30c739cSEd Maste 			    "usb error on tx: %s\n", usbd_errstr(error));
1447d30c739cSEd Maste 			usbd_xfer_set_stall(xfer);
1448d30c739cSEd Maste 			goto tr_setup;
1449d30c739cSEd Maste 		}
1450d30c739cSEd Maste 		return;
1451d30c739cSEd Maste 	}
1452d30c739cSEd Maste }
1453d30c739cSEd Maste 
1454b4872d67SOleksandr Tymoshenko /**
1455b4872d67SOleksandr Tymoshenko  *	muge_set_mac_addr - Initiailizes NIC MAC address
1456d30c739cSEd Maste  *	@ue: the USB ethernet device
1457d30c739cSEd Maste  *
1458b4872d67SOleksandr Tymoshenko  *	Tries to obtain MAC address from number of sources: registers,
1459b4872d67SOleksandr Tymoshenko  *	EEPROM, DTB blob. If all sources fail - generates random MAC.
1460d30c739cSEd Maste  */
1461d30c739cSEd Maste static void
muge_set_mac_addr(struct usb_ether * ue)1462b4872d67SOleksandr Tymoshenko muge_set_mac_addr(struct usb_ether *ue)
1463d30c739cSEd Maste {
1464d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1465d30c739cSEd Maste 	uint32_t mac_h, mac_l;
1466d30c739cSEd Maste 
1467d736b527SIan Lepore 	memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN);
1468d30c739cSEd Maste 
1469d30c739cSEd Maste 	uint32_t val;
1470d30c739cSEd Maste 	lan78xx_read_reg(sc, 0, &val);
1471d30c739cSEd Maste 
1472e5151258SEd Maste 	/* Read current MAC address from RX_ADDRx registers. */
147348bc1758SEd Maste 	if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) &&
147448bc1758SEd Maste 	    (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) {
1475d736b527SIan Lepore 		ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1476d736b527SIan Lepore 		ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff);
1477d736b527SIan Lepore 		ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1478d736b527SIan Lepore 		ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1479d736b527SIan Lepore 		ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1480d736b527SIan Lepore 		ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff);
1481d30c739cSEd Maste 	}
1482d30c739cSEd Maste 
1483a58040e7SIan Lepore 	/*
1484a58040e7SIan Lepore 	 * If RX_ADDRx did not provide a valid MAC address, try EEPROM.  If that
1485a58040e7SIan Lepore 	 * doesn't work, try OTP.  Whether any of these methods work or not, try
1486a58040e7SIan Lepore 	 * FDT data, because it is allowed to override the EEPROM/OTP values.
1487a58040e7SIan Lepore 	 */
1488d736b527SIan Lepore 	if (ETHER_IS_VALID(ue->ue_eaddr)) {
1489b4872d67SOleksandr Tymoshenko 		muge_dbg_printf(sc, "MAC assigned from registers\n");
1490a58040e7SIan Lepore 	} else if (lan78xx_eeprom_present(sc) && lan78xx_eeprom_read_raw(sc,
1491a58040e7SIan Lepore 	    ETH_E2P_MAC_OFFSET, ue->ue_eaddr, ETHER_ADDR_LEN) == 0 &&
1492a58040e7SIan Lepore 	    ETHER_IS_VALID(ue->ue_eaddr)) {
1493a58040e7SIan Lepore 		muge_dbg_printf(sc, "MAC assigned from EEPROM\n");
1494a58040e7SIan Lepore 	} else if (lan78xx_otp_read(sc, OTP_MAC_OFFSET, ue->ue_eaddr,
1495a58040e7SIan Lepore 	    ETHER_ADDR_LEN) == 0 && ETHER_IS_VALID(ue->ue_eaddr)) {
1496a58040e7SIan Lepore 		muge_dbg_printf(sc, "MAC assigned from OTP\n");
1497b4872d67SOleksandr Tymoshenko 	}
1498b4872d67SOleksandr Tymoshenko 
1499b4872d67SOleksandr Tymoshenko #ifdef FDT
150018dc4538SIan Lepore 	/* ue->ue_eaddr modified only if config exists for this dev instance. */
150118dc4538SIan Lepore 	usb_fdt_get_mac_addr(ue->ue_dev, ue);
1502d736b527SIan Lepore 	if (ETHER_IS_VALID(ue->ue_eaddr)) {
1503a58040e7SIan Lepore 		muge_dbg_printf(sc, "MAC assigned from FDT data\n");
1504b4872d67SOleksandr Tymoshenko 	}
1505b4872d67SOleksandr Tymoshenko #endif
1506b4872d67SOleksandr Tymoshenko 
1507a58040e7SIan Lepore 	if (!ETHER_IS_VALID(ue->ue_eaddr)) {
1508d30c739cSEd Maste 		muge_dbg_printf(sc, "MAC assigned randomly\n");
1509d736b527SIan Lepore 		arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0);
1510d736b527SIan Lepore 		ue->ue_eaddr[0] &= ~0x01;	/* unicast */
1511d736b527SIan Lepore 		ue->ue_eaddr[0] |= 0x02;	/* locally administered */
1512d30c739cSEd Maste 	}
1513a58040e7SIan Lepore }
1514b4872d67SOleksandr Tymoshenko 
1515b4872d67SOleksandr Tymoshenko /**
151660ce15edSEd Maste  *	muge_set_leds - Initializes NIC LEDs pattern
151760ce15edSEd Maste  *	@ue: the USB ethernet device
151860ce15edSEd Maste  *
151960ce15edSEd Maste  *	Tries to store the LED modes.
152060ce15edSEd Maste  *	Supports only DTB blob like the	Linux driver does.
152160ce15edSEd Maste  */
152260ce15edSEd Maste static void
muge_set_leds(struct usb_ether * ue)152360ce15edSEd Maste muge_set_leds(struct usb_ether *ue)
152460ce15edSEd Maste {
152560ce15edSEd Maste #ifdef FDT
15262c597054SIan Lepore 	struct muge_softc *sc = uether_getsc(ue);
152718dc4538SIan Lepore 	phandle_t node;
1528d736b527SIan Lepore 	pcell_t modes[4];	/* 4 LEDs are possible */
152903dec173SEd Maste 	ssize_t proplen;
153060ce15edSEd Maste 	uint32_t count;
153160ce15edSEd Maste 
153218dc4538SIan Lepore 	if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 &&
1533d736b527SIan Lepore 	    (proplen = OF_getencprop(node, "microchip,led-modes", modes,
1534d736b527SIan Lepore 	    sizeof(modes))) > 0) {
153503dec173SEd Maste 		count = proplen / sizeof( uint32_t );
153660ce15edSEd Maste 		sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ |
153760ce15edSEd Maste 			      (count > 1) * ETH_HW_CFG_LED1_EN_ |
153860ce15edSEd Maste 			      (count > 2) * ETH_HW_CFG_LED2_EN_ |
153960ce15edSEd Maste 			      (count > 3) * ETH_HW_CFG_LED3_EN_;
154003dec173SEd Maste 		while (count-- > 0) {
1541d736b527SIan Lepore 			sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count);
15422c597054SIan Lepore 			sc->sc_led_modes_mask |= 0xf << (4 * count);
154303dec173SEd Maste 		}
154418dc4538SIan Lepore 		muge_dbg_printf(sc, "LED modes set from FDT data\n");
154560ce15edSEd Maste 	}
154660ce15edSEd Maste #endif
154760ce15edSEd Maste }
154860ce15edSEd Maste 
154960ce15edSEd Maste /**
1550b4872d67SOleksandr Tymoshenko  *	muge_attach_post - Called after the driver attached to the USB interface
1551b4872d67SOleksandr Tymoshenko  *	@ue: the USB ethernet device
1552b4872d67SOleksandr Tymoshenko  *
1553b4872d67SOleksandr Tymoshenko  *	This is where the chip is intialised for the first time.  This is
155494466c43SGordon Bergling  *	different from the muge_init() function in that that one is designed to
1555b4872d67SOleksandr Tymoshenko  *	setup the H/W to match the UE settings and can be called after a reset.
1556b4872d67SOleksandr Tymoshenko  *
1557b4872d67SOleksandr Tymoshenko  */
1558b4872d67SOleksandr Tymoshenko static void
muge_attach_post(struct usb_ether * ue)1559b4872d67SOleksandr Tymoshenko muge_attach_post(struct usb_ether *ue)
1560b4872d67SOleksandr Tymoshenko {
1561b4872d67SOleksandr Tymoshenko 	struct muge_softc *sc = uether_getsc(ue);
1562b4872d67SOleksandr Tymoshenko 
1563b4872d67SOleksandr Tymoshenko 	muge_dbg_printf(sc, "Calling muge_attach_post.\n");
1564b4872d67SOleksandr Tymoshenko 
1565b4872d67SOleksandr Tymoshenko 	/* Setup some of the basics */
1566b4872d67SOleksandr Tymoshenko 	sc->sc_phyno = 1;
1567b4872d67SOleksandr Tymoshenko 
1568b4872d67SOleksandr Tymoshenko 	muge_set_mac_addr(ue);
156960ce15edSEd Maste 	muge_set_leds(ue);
1570d30c739cSEd Maste 
1571d30c739cSEd Maste 	/* Initialise the chip for the first time */
1572d30c739cSEd Maste 	lan78xx_chip_init(sc);
1573d30c739cSEd Maste }
1574d30c739cSEd Maste 
1575d30c739cSEd Maste /**
1576d30c739cSEd Maste  *	muge_attach_post_sub - Called after attach to the USB interface
1577d30c739cSEd Maste  *	@ue: the USB ethernet device
1578d30c739cSEd Maste  *
1579d30c739cSEd Maste  *	Most of this is boilerplate code and copied from the base USB ethernet
1580d0ddb5aaSGordon Bergling  *	driver.  It has been overridden so that we can indicate to the system
1581d30c739cSEd Maste  *	that the chip supports H/W checksumming.
1582d30c739cSEd Maste  *
1583d30c739cSEd Maste  *	RETURNS:
1584d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
1585d30c739cSEd Maste  */
1586d30c739cSEd Maste static int
muge_attach_post_sub(struct usb_ether * ue)1587d30c739cSEd Maste muge_attach_post_sub(struct usb_ether *ue)
1588d30c739cSEd Maste {
1589d30c739cSEd Maste 	struct muge_softc *sc;
1590935b194dSJustin Hibbits 	if_t ifp;
1591d30c739cSEd Maste 
1592d30c739cSEd Maste 	sc = uether_getsc(ue);
1593d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n");
1594d30c739cSEd Maste 	ifp = ue->ue_ifp;
1595935b194dSJustin Hibbits 	if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
1596935b194dSJustin Hibbits 	if_setstartfn(ifp, uether_start);
1597935b194dSJustin Hibbits 	if_setioctlfn(ifp, muge_ioctl);
1598935b194dSJustin Hibbits 	if_setinitfn(ifp, uether_init);
1599935b194dSJustin Hibbits 	if_setsendqlen(ifp, ifqmaxlen);
1600935b194dSJustin Hibbits 	if_setsendqready(ifp);
1601d30c739cSEd Maste 
1602d30c739cSEd Maste 	/*
1603d30c739cSEd Maste 	 * The chip supports TCP/UDP checksum offloading on TX and RX paths,
1604d30c739cSEd Maste 	 * however currently only RX checksum is supported in the driver
1605d30c739cSEd Maste 	 * (see top of file).
1606d30c739cSEd Maste 	 */
1607935b194dSJustin Hibbits 	if_setcapabilitiesbit(ifp, IFCAP_VLAN_MTU, 0);
1608935b194dSJustin Hibbits 	if_sethwassist(ifp, 0);
1609935b194dSJustin Hibbits 	if_setcapabilitiesbit(ifp, IFCAP_RXCSUM, 0);
1610d30c739cSEd Maste 
1611d30c739cSEd Maste 	if (MUGE_DEFAULT_TX_CSUM_ENABLE)
1612935b194dSJustin Hibbits 		if_setcapabilitiesbit(ifp, IFCAP_TXCSUM, 0);
1613d30c739cSEd Maste 
1614d30c739cSEd Maste 	/*
1615d30c739cSEd Maste 	 * In the Linux driver they also enable scatter/gather (NETIF_F_SG)
1616d30c739cSEd Maste 	 * here, that's something related to socket buffers used in Linux.
1617d30c739cSEd Maste 	 * FreeBSD doesn't have that as an interface feature.
1618d30c739cSEd Maste 	 */
16196c0331eaSEd Maste 	if (MUGE_DEFAULT_TSO_ENABLE)
1620935b194dSJustin Hibbits 		if_setcapabilitiesbit(ifp, IFCAP_TSO4 | IFCAP_TSO6, 0);
1621d30c739cSEd Maste 
1622d30c739cSEd Maste #if 0
1623d30c739cSEd Maste 	/* TX checksuming is disabled since not yet implemented. */
1624935b194dSJustin Hibbits 	if_setcapabilitiesbit(ifp, IFCAP_TXCSUM, 0);
1625935b194dSJustin Hibbits 	if_setcapenablebit(ifp, IFCAP_TXCSUM, 0);
1626935b194dSJustin Hibbits 	if_sethwassist(ifp, CSUM_TCP | CSUM_UDP);
1627d30c739cSEd Maste #endif
1628d30c739cSEd Maste 
1629935b194dSJustin Hibbits 	if_setcapenable(ifp, if_getcapabilities(ifp));
1630d30c739cSEd Maste 
1631c6df6f53SWarner Losh 	bus_topo_lock();
1632f7097359SWarner Losh 	mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, uether_ifmedia_upd,
16339f6954e5SEd Maste 	    ue->ue_methods->ue_mii_sts, BMSR_DEFCAPMASK, sc->sc_phyno,
16349f6954e5SEd Maste 	    MII_OFFSET_ANY, 0);
1635c6df6f53SWarner Losh 	bus_topo_unlock();
1636d30c739cSEd Maste 
1637e5151258SEd Maste 	return (0);
1638d30c739cSEd Maste }
1639d30c739cSEd Maste 
1640d30c739cSEd Maste /**
1641d30c739cSEd Maste  *	muge_start - Starts communication with the LAN78xx chip
1642d30c739cSEd Maste  *	@ue: USB ether interface
1643d30c739cSEd Maste  */
1644d30c739cSEd Maste static void
muge_start(struct usb_ether * ue)1645d30c739cSEd Maste muge_start(struct usb_ether *ue)
1646d30c739cSEd Maste {
1647d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1648d30c739cSEd Maste 
1649d30c739cSEd Maste 	/*
1650d30c739cSEd Maste 	 * Start the USB transfers, if not already started.
1651d30c739cSEd Maste 	 */
1652d30c739cSEd Maste 	usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]);
1653d30c739cSEd Maste 	usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]);
1654d30c739cSEd Maste }
1655d30c739cSEd Maste 
1656d30c739cSEd Maste /**
1657d30c739cSEd Maste  *	muge_ioctl - ioctl function for the device
1658d30c739cSEd Maste  *	@ifp: interface pointer
1659d30c739cSEd Maste  *	@cmd: the ioctl command
1660d30c739cSEd Maste  *	@data: data passed in the ioctl call, typically a pointer to struct
1661d30c739cSEd Maste  *	ifreq.
1662d30c739cSEd Maste  *
1663d30c739cSEd Maste  *	The ioctl routine is overridden to detect change requests for the H/W
1664d30c739cSEd Maste  *	checksum capabilities.
1665d30c739cSEd Maste  *
1666d30c739cSEd Maste  *	RETURNS:
1667d30c739cSEd Maste  *	0 on success and an error code on failure.
1668d30c739cSEd Maste  */
1669d30c739cSEd Maste static int
muge_ioctl(if_t ifp,u_long cmd,caddr_t data)1670935b194dSJustin Hibbits muge_ioctl(if_t ifp, u_long cmd, caddr_t data)
1671d30c739cSEd Maste {
1672935b194dSJustin Hibbits 	struct usb_ether *ue = if_getsoftc(ifp);
1673d30c739cSEd Maste 	struct muge_softc *sc;
1674d30c739cSEd Maste 	struct ifreq *ifr;
1675d30c739cSEd Maste 	int rc;
1676d30c739cSEd Maste 	int mask;
1677d30c739cSEd Maste 	int reinit;
1678d30c739cSEd Maste 
1679d30c739cSEd Maste 	if (cmd == SIOCSIFCAP) {
1680d30c739cSEd Maste 		sc = uether_getsc(ue);
1681d30c739cSEd Maste 		ifr = (struct ifreq *)data;
1682d30c739cSEd Maste 
1683d30c739cSEd Maste 		MUGE_LOCK(sc);
1684d30c739cSEd Maste 
1685d30c739cSEd Maste 		rc = 0;
1686d30c739cSEd Maste 		reinit = 0;
1687d30c739cSEd Maste 
1688935b194dSJustin Hibbits 		mask = ifr->ifr_reqcap ^ if_getcapenable(ifp);
1689d30c739cSEd Maste 
1690e5151258SEd Maste 		/* Modify the RX CSUM enable bits. */
1691d30c739cSEd Maste 		if ((mask & IFCAP_RXCSUM) != 0 &&
1692935b194dSJustin Hibbits 		    (if_getcapabilities(ifp) & IFCAP_RXCSUM) != 0) {
1693935b194dSJustin Hibbits 			if_togglecapenable(ifp, IFCAP_RXCSUM);
1694d30c739cSEd Maste 
1695935b194dSJustin Hibbits 			if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) {
1696935b194dSJustin Hibbits 				if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
1697d30c739cSEd Maste 				reinit = 1;
1698d30c739cSEd Maste 			}
1699d30c739cSEd Maste 		}
1700d30c739cSEd Maste 
1701d30c739cSEd Maste 		MUGE_UNLOCK(sc);
1702d30c739cSEd Maste 		if (reinit)
1703d30c739cSEd Maste 			uether_init(ue);
1704d30c739cSEd Maste 	} else {
1705d30c739cSEd Maste 		rc = uether_ioctl(ifp, cmd, data);
1706d30c739cSEd Maste 	}
1707d30c739cSEd Maste 
1708d30c739cSEd Maste 	return (rc);
1709d30c739cSEd Maste }
1710d30c739cSEd Maste 
1711d30c739cSEd Maste /**
1712d30c739cSEd Maste  *	muge_reset - Reset the SMSC chip
1713d30c739cSEd Maste  *	@sc: device soft context
1714d30c739cSEd Maste  *
1715d30c739cSEd Maste  *	LOCKING:
1716d30c739cSEd Maste  *	Should be called with the SMSC lock held.
1717d30c739cSEd Maste  */
1718d30c739cSEd Maste static void
muge_reset(struct muge_softc * sc)1719d30c739cSEd Maste muge_reset(struct muge_softc *sc)
1720d30c739cSEd Maste {
1721d30c739cSEd Maste 	struct usb_config_descriptor *cd;
1722d30c739cSEd Maste 	usb_error_t err;
1723d30c739cSEd Maste 
1724d30c739cSEd Maste 	cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
1725d30c739cSEd Maste 
1726d30c739cSEd Maste 	err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
1727d30c739cSEd Maste 	    cd->bConfigurationValue);
1728d30c739cSEd Maste 	if (err)
1729d30c739cSEd Maste 		muge_warn_printf(sc, "reset failed (ignored)\n");
1730d30c739cSEd Maste 
1731d30c739cSEd Maste 	/* Wait a little while for the chip to get its brains in order. */
1732d30c739cSEd Maste 	uether_pause(&sc->sc_ue, hz / 100);
1733d30c739cSEd Maste 
1734d30c739cSEd Maste 	/* Reinitialize controller to achieve full reset. */
1735d30c739cSEd Maste 	lan78xx_chip_init(sc);
1736d30c739cSEd Maste }
1737d30c739cSEd Maste 
1738d30c739cSEd Maste /**
1739d30c739cSEd Maste  * muge_set_addr_filter
1740d30c739cSEd Maste  *
1741d30c739cSEd Maste  *	@sc: device soft context
1742d30c739cSEd Maste  *	@index: index of the entry to the perfect address table
1743d30c739cSEd Maste  *	@addr: address to be written
1744d30c739cSEd Maste  *
1745d30c739cSEd Maste  */
1746d30c739cSEd Maste static void
muge_set_addr_filter(struct muge_softc * sc,int index,uint8_t addr[ETHER_ADDR_LEN])1747d30c739cSEd Maste muge_set_addr_filter(struct muge_softc *sc, int index,
1748d30c739cSEd Maste     uint8_t addr[ETHER_ADDR_LEN])
1749d30c739cSEd Maste {
1750d30c739cSEd Maste 	uint32_t tmp;
1751d30c739cSEd Maste 
1752d30c739cSEd Maste 	if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) {
1753d30c739cSEd Maste 		tmp = addr[3];
1754d30c739cSEd Maste 		tmp |= addr[2] | (tmp << 8);
1755d30c739cSEd Maste 		tmp |= addr[1] | (tmp << 8);
1756d30c739cSEd Maste 		tmp |= addr[0] | (tmp << 8);
1757d30c739cSEd Maste 		sc->sc_pfilter_table[index][1] = tmp;
1758d30c739cSEd Maste 		tmp = addr[5];
1759d30c739cSEd Maste 		tmp |= addr[4] | (tmp << 8);
176048bc1758SEd Maste 		tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_;
1761d30c739cSEd Maste 		sc->sc_pfilter_table[index][0] = tmp;
1762d30c739cSEd Maste 	}
1763d30c739cSEd Maste }
1764d30c739cSEd Maste 
1765d30c739cSEd Maste /**
1766d30c739cSEd Maste  *	lan78xx_dataport_write - write to the selected RAM
1767d30c739cSEd Maste  *	@sc: The device soft context.
1768d30c739cSEd Maste  *	@ram_select: Select which RAM to access.
1769d30c739cSEd Maste  *	@addr: Starting address to write to.
1770d30c739cSEd Maste  *	@buf: word-sized buffer to write to RAM, starting at @addr.
1771d30c739cSEd Maste  *	@length: length of @buf
1772d30c739cSEd Maste  *
1773d30c739cSEd Maste  *
1774d30c739cSEd Maste  *	RETURNS:
1775d30c739cSEd Maste  *	0 if write successful.
1776d30c739cSEd Maste  */
1777d30c739cSEd Maste static int
lan78xx_dataport_write(struct muge_softc * sc,uint32_t ram_select,uint32_t addr,uint32_t length,uint32_t * buf)1778d30c739cSEd Maste lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select,
1779d30c739cSEd Maste     uint32_t addr, uint32_t length, uint32_t *buf)
1780d30c739cSEd Maste {
1781d30c739cSEd Maste 	uint32_t dp_sel;
1782d30c739cSEd Maste 	int i, ret;
1783d30c739cSEd Maste 
1784d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
178548bc1758SEd Maste 	ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1786d30c739cSEd Maste 	if (ret < 0)
1787d30c739cSEd Maste 		goto done;
1788d30c739cSEd Maste 
178948bc1758SEd Maste 	ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel);
1790d30c739cSEd Maste 
179148bc1758SEd Maste 	dp_sel &= ~ETH_DP_SEL_RSEL_MASK_;
1792d30c739cSEd Maste 	dp_sel |= ram_select;
1793d30c739cSEd Maste 
179448bc1758SEd Maste 	ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel);
1795d30c739cSEd Maste 
1796d30c739cSEd Maste 	for (i = 0; i < length; i++) {
179748bc1758SEd Maste 		ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i);
179848bc1758SEd Maste 		ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]);
179948bc1758SEd Maste 		ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_);
180048bc1758SEd Maste 		ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1801d30c739cSEd Maste 		if (ret != 0)
1802d30c739cSEd Maste 			goto done;
1803d30c739cSEd Maste 	}
1804d30c739cSEd Maste 
1805d30c739cSEd Maste done:
1806e5151258SEd Maste 	return (ret);
1807d30c739cSEd Maste }
1808d30c739cSEd Maste 
1809d30c739cSEd Maste /**
1810d30c739cSEd Maste  * muge_multicast_write
1811d30c739cSEd Maste  * @sc: device's soft context
1812d30c739cSEd Maste  *
1813*046fe202SGordon Bergling  * Writes perfect address filters and hash address filters to their
1814d30c739cSEd Maste  * corresponding registers and RAMs.
1815d30c739cSEd Maste  *
1816d30c739cSEd Maste  */
1817d30c739cSEd Maste static void
muge_multicast_write(struct muge_softc * sc)1818d30c739cSEd Maste muge_multicast_write(struct muge_softc *sc)
1819d30c739cSEd Maste {
1820f7097359SWarner Losh 	int i;
182148bc1758SEd Maste 	lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_,
182248bc1758SEd Maste 	    ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN,
182348bc1758SEd Maste 	    sc->sc_mchash_table);
1824d30c739cSEd Maste 
1825d30c739cSEd Maste 	for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
1826f7097359SWarner Losh 		lan78xx_write_reg(sc, PFILTER_HI(i), 0);
1827f7097359SWarner Losh 		lan78xx_write_reg(sc, PFILTER_LO(i),
1828d30c739cSEd Maste 		    sc->sc_pfilter_table[i][1]);
1829f7097359SWarner Losh 		lan78xx_write_reg(sc, PFILTER_HI(i),
1830d30c739cSEd Maste 		    sc->sc_pfilter_table[i][0]);
1831d30c739cSEd Maste 	}
1832d30c739cSEd Maste }
1833d30c739cSEd Maste 
1834d30c739cSEd Maste /**
1835d30c739cSEd Maste  *	muge_hash - Calculate the hash of a mac address
1836d30c739cSEd Maste  *	@addr: The mac address to calculate the hash on
1837d30c739cSEd Maste  *
1838d30c739cSEd Maste  *	This function is used when configuring a range of multicast mac
1839d30c739cSEd Maste  *	addresses to filter on.  The hash of the mac address is put in the
1840d30c739cSEd Maste  *	device's mac hash table.
1841d30c739cSEd Maste  *
1842d30c739cSEd Maste  *	RETURNS:
1843d30c739cSEd Maste  *	Returns a value from 0-63 value which is the hash of the mac address.
1844d30c739cSEd Maste  */
1845d30c739cSEd Maste static inline uint32_t
muge_hash(uint8_t addr[ETHER_ADDR_LEN])1846d30c739cSEd Maste muge_hash(uint8_t addr[ETHER_ADDR_LEN])
1847d30c739cSEd Maste {
1848a99020fbSKevin Lo 	return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff;
1849d30c739cSEd Maste }
1850d30c739cSEd Maste 
185141840e2dSGleb Smirnoff static u_int
muge_hash_maddr(void * arg,struct sockaddr_dl * sdl,u_int cnt)185241840e2dSGleb Smirnoff muge_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
185341840e2dSGleb Smirnoff {
185441840e2dSGleb Smirnoff 	struct muge_softc *sc = arg;
185541840e2dSGleb Smirnoff 	uint32_t bitnum;
185641840e2dSGleb Smirnoff 
185741840e2dSGleb Smirnoff 	/* First fill up the perfect address table. */
185841840e2dSGleb Smirnoff 	if (cnt < 32 /* XXX */)
185941840e2dSGleb Smirnoff 		muge_set_addr_filter(sc, cnt + 1, LLADDR(sdl));
186041840e2dSGleb Smirnoff 	else {
186141840e2dSGleb Smirnoff 		bitnum = muge_hash(LLADDR(sdl));
186241840e2dSGleb Smirnoff 		sc->sc_mchash_table[bitnum / 32] |= (1 << (bitnum % 32));
186341840e2dSGleb Smirnoff 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_HASH_;
186441840e2dSGleb Smirnoff 	}
186541840e2dSGleb Smirnoff 
186641840e2dSGleb Smirnoff 	return (1);
186741840e2dSGleb Smirnoff }
186841840e2dSGleb Smirnoff 
1869d30c739cSEd Maste /**
1870d30c739cSEd Maste  *	muge_setmulti - Setup multicast
1871d30c739cSEd Maste  *	@ue: usb ethernet device context
1872d30c739cSEd Maste  *
1873d30c739cSEd Maste  *	Tells the device to either accept frames with a multicast mac address,
1874d30c739cSEd Maste  *	a select group of m'cast mac addresses or just the devices mac address.
1875d30c739cSEd Maste  *
1876d30c739cSEd Maste  *	LOCKING:
1877d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1878d30c739cSEd Maste  */
1879d30c739cSEd Maste static void
muge_setmulti(struct usb_ether * ue)1880d30c739cSEd Maste muge_setmulti(struct usb_ether *ue)
1881d30c739cSEd Maste {
1882d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1883935b194dSJustin Hibbits 	if_t ifp = uether_getifp(ue);
188441840e2dSGleb Smirnoff 	uint8_t i;
1885d30c739cSEd Maste 
1886d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1887d30c739cSEd Maste 
188848bc1758SEd Maste 	sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ |
188948bc1758SEd Maste 	    ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_);
1890d30c739cSEd Maste 
1891e5151258SEd Maste 	/* Initialize hash filter table. */
189248bc1758SEd Maste 	for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++)
1893d30c739cSEd Maste 		sc->sc_mchash_table[i] = 0;
1894d30c739cSEd Maste 
1895e5151258SEd Maste 	/* Initialize perfect filter table. */
1896d30c739cSEd Maste 	for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
18979f6954e5SEd Maste 		sc->sc_pfilter_table[i][0] = sc->sc_pfilter_table[i][1] = 0;
1898d30c739cSEd Maste 	}
1899d30c739cSEd Maste 
190048bc1758SEd Maste 	sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_;
1901d30c739cSEd Maste 
1902935b194dSJustin Hibbits 	if (if_getflags(ifp) & IFF_PROMISC) {
1903d30c739cSEd Maste 		muge_dbg_printf(sc, "promiscuous mode enabled\n");
190448bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1905935b194dSJustin Hibbits 	} else if (if_getflags(ifp) & IFF_ALLMULTI) {
1906d30c739cSEd Maste 		muge_dbg_printf(sc, "receive all multicast enabled\n");
190748bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_;
1908d30c739cSEd Maste 	} else {
190941840e2dSGleb Smirnoff 		if_foreach_llmaddr(ifp, muge_hash_maddr, sc);
1910d30c739cSEd Maste 		muge_multicast_write(sc);
1911d30c739cSEd Maste 	}
191248bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1913d30c739cSEd Maste }
1914d30c739cSEd Maste 
1915d30c739cSEd Maste /**
1916d30c739cSEd Maste  *	muge_setpromisc - Enables/disables promiscuous mode
1917d30c739cSEd Maste  *	@ue: usb ethernet device context
1918d30c739cSEd Maste  *
1919d30c739cSEd Maste  *	LOCKING:
1920d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1921d30c739cSEd Maste  */
1922d30c739cSEd Maste static void
muge_setpromisc(struct usb_ether * ue)1923d30c739cSEd Maste muge_setpromisc(struct usb_ether *ue)
1924d30c739cSEd Maste {
1925d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1926935b194dSJustin Hibbits 	if_t ifp = uether_getifp(ue);
1927d30c739cSEd Maste 
1928d30c739cSEd Maste 	muge_dbg_printf(sc, "promiscuous mode %sabled\n",
1929935b194dSJustin Hibbits 	    (if_getflags(ifp) & IFF_PROMISC) ? "en" : "dis");
1930d30c739cSEd Maste 
1931d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1932d30c739cSEd Maste 
1933935b194dSJustin Hibbits 	if (if_getflags(ifp) & IFF_PROMISC)
193448bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1935d30c739cSEd Maste 	else
193648bc1758SEd Maste 		sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_);
1937d30c739cSEd Maste 
193848bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1939d30c739cSEd Maste }
1940d30c739cSEd Maste 
1941d30c739cSEd Maste /**
1942d30c739cSEd Maste  *	muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming
1943d30c739cSEd Maste  *	@sc: driver soft context
1944d30c739cSEd Maste  *
1945d30c739cSEd Maste  *	LOCKING:
1946d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1947d30c739cSEd Maste  *
1948d30c739cSEd Maste  *	RETURNS:
1949d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
1950d30c739cSEd Maste  */
19519f6954e5SEd Maste static int
muge_sethwcsum(struct muge_softc * sc)19529f6954e5SEd Maste muge_sethwcsum(struct muge_softc *sc)
1953d30c739cSEd Maste {
1954935b194dSJustin Hibbits 	if_t ifp = uether_getifp(&sc->sc_ue);
1955d30c739cSEd Maste 	int err;
1956d30c739cSEd Maste 
1957d30c739cSEd Maste 	if (!ifp)
1958d30c739cSEd Maste 		return (-EIO);
1959d30c739cSEd Maste 
1960d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1961d30c739cSEd Maste 
1962935b194dSJustin Hibbits 	if (if_getcapenable(ifp) & IFCAP_RXCSUM) {
196348bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_;
196448bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_;
1965d30c739cSEd Maste 	} else {
196648bc1758SEd Maste 		sc->sc_rfe_ctl &=
196748bc1758SEd Maste 		    ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_);
196848bc1758SEd Maste 		sc->sc_rfe_ctl &=
196948bc1758SEd Maste 		     ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_);
1970d30c739cSEd Maste 	}
1971d30c739cSEd Maste 
197248bc1758SEd Maste 	sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_;
1973d30c739cSEd Maste 
197448bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1975d30c739cSEd Maste 
1976d30c739cSEd Maste 	if (err != 0) {
197748bc1758SEd Maste 		muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n",
197848bc1758SEd Maste 		    err);
1979d30c739cSEd Maste 		return (err);
1980d30c739cSEd Maste 	}
1981d30c739cSEd Maste 
1982d30c739cSEd Maste 	return (0);
1983d30c739cSEd Maste }
1984d30c739cSEd Maste 
1985d30c739cSEd Maste /**
1986d30c739cSEd Maste  *	muge_ifmedia_upd - Set media options
1987d30c739cSEd Maste  *	@ifp: interface pointer
1988d30c739cSEd Maste  *
1989d30c739cSEd Maste  *	Basically boilerplate code that simply calls the mii functions to set
1990d30c739cSEd Maste  *	the media options.
1991d30c739cSEd Maste  *
1992d30c739cSEd Maste  *	LOCKING:
1993d30c739cSEd Maste  *	The device lock must be held before this function is called.
1994d30c739cSEd Maste  *
1995d30c739cSEd Maste  *	RETURNS:
1996d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
1997d30c739cSEd Maste  */
1998d30c739cSEd Maste static int
muge_ifmedia_upd(if_t ifp)1999935b194dSJustin Hibbits muge_ifmedia_upd(if_t ifp)
2000d30c739cSEd Maste {
2001935b194dSJustin Hibbits 	struct muge_softc *sc = if_getsoftc(ifp);
2002d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n");
2003d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
2004d30c739cSEd Maste 	struct mii_softc *miisc;
2005d30c739cSEd Maste 	int err;
2006d30c739cSEd Maste 
2007d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
2008d30c739cSEd Maste 
2009d30c739cSEd Maste 	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
2010d30c739cSEd Maste 		PHY_RESET(miisc);
2011d30c739cSEd Maste 	err = mii_mediachg(mii);
2012d30c739cSEd Maste 	return (err);
2013d30c739cSEd Maste }
2014d30c739cSEd Maste 
2015d30c739cSEd Maste /**
2016d30c739cSEd Maste  *	muge_init - Initialises the LAN95xx chip
2017d30c739cSEd Maste  *	@ue: USB ether interface
2018d30c739cSEd Maste  *
2019d30c739cSEd Maste  *	Called when the interface is brought up (i.e. ifconfig ue0 up), this
2020d30c739cSEd Maste  *	initialise the interface and the rx/tx pipes.
2021d30c739cSEd Maste  *
2022d30c739cSEd Maste  *	LOCKING:
2023d30c739cSEd Maste  *	Should be called with the MUGE lock held.
2024d30c739cSEd Maste  */
2025d30c739cSEd Maste static void
muge_init(struct usb_ether * ue)2026d30c739cSEd Maste muge_init(struct usb_ether *ue)
2027d30c739cSEd Maste {
2028d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
2029d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_init.\n");
2030935b194dSJustin Hibbits 	if_t ifp = uether_getifp(ue);
2031d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
2032d30c739cSEd Maste 
2033935b194dSJustin Hibbits 	if (lan78xx_setmacaddress(sc, if_getlladdr(ifp)))
2034d30c739cSEd Maste 		muge_dbg_printf(sc, "setting MAC address failed\n");
2035d30c739cSEd Maste 
2036935b194dSJustin Hibbits 	if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0)
2037d30c739cSEd Maste 		return;
2038d30c739cSEd Maste 
2039e5151258SEd Maste 	/* Cancel pending I/O. */
2040d30c739cSEd Maste 	muge_stop(ue);
2041d30c739cSEd Maste 
2042d30c739cSEd Maste 	/* Reset the ethernet interface. */
2043d30c739cSEd Maste 	muge_reset(sc);
2044d30c739cSEd Maste 
2045d30c739cSEd Maste 	/* Load the multicast filter. */
2046d30c739cSEd Maste 	muge_setmulti(ue);
2047d30c739cSEd Maste 
2048d30c739cSEd Maste 	/* TCP/UDP checksum offload engines. */
2049d30c739cSEd Maste 	muge_sethwcsum(sc);
2050d30c739cSEd Maste 
2051d30c739cSEd Maste 	usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]);
2052d30c739cSEd Maste 
2053d30c739cSEd Maste 	/* Indicate we are up and running. */
2054935b194dSJustin Hibbits 	if_setdrvflagbits(ifp, IFF_DRV_RUNNING, 0);
2055d30c739cSEd Maste 
2056d30c739cSEd Maste 	/* Switch to selected media. */
2057d30c739cSEd Maste 	muge_ifmedia_upd(ifp);
2058d30c739cSEd Maste 	muge_start(ue);
2059d30c739cSEd Maste }
2060d30c739cSEd Maste 
2061d30c739cSEd Maste /**
2062d30c739cSEd Maste  *	muge_stop - Stops communication with the LAN78xx chip
2063d30c739cSEd Maste  *	@ue: USB ether interface
2064d30c739cSEd Maste  */
2065d30c739cSEd Maste static void
muge_stop(struct usb_ether * ue)2066d30c739cSEd Maste muge_stop(struct usb_ether *ue)
2067d30c739cSEd Maste {
2068d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
2069935b194dSJustin Hibbits 	if_t ifp = uether_getifp(ue);
2070d30c739cSEd Maste 
2071d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
2072d30c739cSEd Maste 
2073935b194dSJustin Hibbits 	if_setdrvflagbits(ifp, 0, (IFF_DRV_RUNNING | IFF_DRV_OACTIVE));
2074d30c739cSEd Maste 	sc->sc_flags &= ~MUGE_FLAG_LINK;
2075d30c739cSEd Maste 
2076d30c739cSEd Maste 	/*
2077e5151258SEd Maste 	 * Stop all the transfers, if not already stopped.
2078d30c739cSEd Maste 	 */
2079d30c739cSEd Maste 	usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]);
2080d30c739cSEd Maste 	usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]);
2081d30c739cSEd Maste }
2082d30c739cSEd Maste 
2083d30c739cSEd Maste /**
2084d30c739cSEd Maste  *	muge_tick - Called periodically to monitor the state of the LAN95xx chip
2085d30c739cSEd Maste  *	@ue: USB ether interface
2086d30c739cSEd Maste  *
2087d30c739cSEd Maste  *	Simply calls the mii status functions to check the state of the link.
2088d30c739cSEd Maste  *
2089d30c739cSEd Maste  *	LOCKING:
2090d30c739cSEd Maste  *	Should be called with the MUGE lock held.
2091d30c739cSEd Maste  */
2092d30c739cSEd Maste static void
muge_tick(struct usb_ether * ue)2093d30c739cSEd Maste muge_tick(struct usb_ether *ue)
2094d30c739cSEd Maste {
2095d30c739cSEd Maste 
2096d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
2097d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
2098d30c739cSEd Maste 
2099d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
2100d30c739cSEd Maste 
2101d30c739cSEd Maste 	mii_tick(mii);
2102d30c739cSEd Maste 	if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
2103d30c739cSEd Maste 		lan78xx_miibus_statchg(ue->ue_dev);
2104d30c739cSEd Maste 		if ((sc->sc_flags & MUGE_FLAG_LINK) != 0)
2105d30c739cSEd Maste 			muge_start(ue);
2106d30c739cSEd Maste 	}
2107d30c739cSEd Maste }
2108d30c739cSEd Maste 
2109d30c739cSEd Maste /**
2110d30c739cSEd Maste  *	muge_ifmedia_sts - Report current media status
2111d30c739cSEd Maste  *	@ifp: inet interface pointer
2112d30c739cSEd Maste  *	@ifmr: interface media request
2113d30c739cSEd Maste  *
2114e5151258SEd Maste  *	Call the mii functions to get the media status.
2115d30c739cSEd Maste  *
2116d30c739cSEd Maste  *	LOCKING:
2117d30c739cSEd Maste  *	Internally takes and releases the device lock.
2118d30c739cSEd Maste  */
2119d30c739cSEd Maste static void
muge_ifmedia_sts(if_t ifp,struct ifmediareq * ifmr)2120935b194dSJustin Hibbits muge_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr)
2121d30c739cSEd Maste {
2122935b194dSJustin Hibbits 	struct muge_softc *sc = if_getsoftc(ifp);
2123d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
2124d30c739cSEd Maste 
2125d30c739cSEd Maste 	MUGE_LOCK(sc);
2126d30c739cSEd Maste 	mii_pollstat(mii);
2127d30c739cSEd Maste 	ifmr->ifm_active = mii->mii_media_active;
2128d30c739cSEd Maste 	ifmr->ifm_status = mii->mii_media_status;
2129d30c739cSEd Maste 	MUGE_UNLOCK(sc);
2130d30c739cSEd Maste }
2131d30c739cSEd Maste 
2132d30c739cSEd Maste /**
2133d30c739cSEd Maste  *	muge_probe - Probe the interface.
2134d30c739cSEd Maste  *	@dev: muge device handle
2135d30c739cSEd Maste  *
2136d30c739cSEd Maste  *	Checks if the device is a match for this driver.
2137d30c739cSEd Maste  *
2138d30c739cSEd Maste  *	RETURNS:
2139d30c739cSEd Maste  *	Returns 0 on success or an error code on failure.
2140d30c739cSEd Maste  */
2141d30c739cSEd Maste static int
muge_probe(device_t dev)2142d30c739cSEd Maste muge_probe(device_t dev)
2143d30c739cSEd Maste {
2144d30c739cSEd Maste 	struct usb_attach_arg *uaa = device_get_ivars(dev);
2145d30c739cSEd Maste 
2146d30c739cSEd Maste 	if (uaa->usb_mode != USB_MODE_HOST)
2147d30c739cSEd Maste 		return (ENXIO);
2148d30c739cSEd Maste 	if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX)
2149d30c739cSEd Maste 		return (ENXIO);
2150d30c739cSEd Maste 	if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX)
2151d30c739cSEd Maste 		return (ENXIO);
2152d30c739cSEd Maste 	return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa));
2153d30c739cSEd Maste }
2154d30c739cSEd Maste 
2155d30c739cSEd Maste /**
2156d30c739cSEd Maste  *	muge_attach - Attach the interface.
2157d30c739cSEd Maste  *	@dev: muge device handle
2158d30c739cSEd Maste  *
2159d30c739cSEd Maste  *	Allocate softc structures, do ifmedia setup and ethernet/BPF attach.
2160d30c739cSEd Maste  *
2161d30c739cSEd Maste  *	RETURNS:
2162d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
2163d30c739cSEd Maste  */
2164d30c739cSEd Maste static int
muge_attach(device_t dev)2165d30c739cSEd Maste muge_attach(device_t dev)
2166d30c739cSEd Maste {
2167d30c739cSEd Maste 	struct usb_attach_arg *uaa = device_get_ivars(dev);
2168d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
2169d30c739cSEd Maste 	struct usb_ether *ue = &sc->sc_ue;
2170d30c739cSEd Maste 	uint8_t iface_index;
2171d30c739cSEd Maste 	int err;
2172d30c739cSEd Maste 
2173d30c739cSEd Maste 	sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
2174d30c739cSEd Maste 
2175d30c739cSEd Maste 	device_set_usb_desc(dev);
2176d30c739cSEd Maste 
2177d30c739cSEd Maste 	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
2178d30c739cSEd Maste 
2179e5151258SEd Maste 	/* Setup the endpoints for the Microchip LAN78xx device. */
2180d30c739cSEd Maste 	iface_index = MUGE_IFACE_IDX;
2181d30c739cSEd Maste 	err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
2182d30c739cSEd Maste 	    muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx);
2183d30c739cSEd Maste 	if (err) {
2184d30c739cSEd Maste 		device_printf(dev, "error: allocating USB transfers failed\n");
218549b2a5feSEd Maste 		goto err;
2186d30c739cSEd Maste 	}
2187d30c739cSEd Maste 
2188d30c739cSEd Maste 	ue->ue_sc = sc;
2189d30c739cSEd Maste 	ue->ue_dev = dev;
2190d30c739cSEd Maste 	ue->ue_udev = uaa->device;
2191d30c739cSEd Maste 	ue->ue_mtx = &sc->sc_mtx;
2192d30c739cSEd Maste 	ue->ue_methods = &muge_ue_methods;
2193d30c739cSEd Maste 
2194d30c739cSEd Maste 	err = uether_ifattach(ue);
2195d30c739cSEd Maste 	if (err) {
2196d30c739cSEd Maste 		device_printf(dev, "error: could not attach interface\n");
219749b2a5feSEd Maste 		goto err_usbd;
2198d30c739cSEd Maste 	}
219949b2a5feSEd Maste 
220049b2a5feSEd Maste 	/* Wait for lan78xx_chip_init from post-attach callback to complete. */
220149b2a5feSEd Maste 	uether_ifattach_wait(ue);
220249b2a5feSEd Maste 	if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE))
220349b2a5feSEd Maste 		goto err_attached;
220449b2a5feSEd Maste 
2205d30c739cSEd Maste 	return (0);
2206d30c739cSEd Maste 
220749b2a5feSEd Maste err_attached:
220849b2a5feSEd Maste 	uether_ifdetach(ue);
220949b2a5feSEd Maste err_usbd:
221049b2a5feSEd Maste 	usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER);
221149b2a5feSEd Maste err:
221249b2a5feSEd Maste 	mtx_destroy(&sc->sc_mtx);
2213d30c739cSEd Maste 	return (ENXIO);
2214d30c739cSEd Maste }
2215d30c739cSEd Maste 
2216d30c739cSEd Maste /**
2217d30c739cSEd Maste  *	muge_detach - Detach the interface.
2218d30c739cSEd Maste  *	@dev: muge device handle
2219d30c739cSEd Maste  *
2220d30c739cSEd Maste  *	RETURNS:
2221d30c739cSEd Maste  *	Returns 0.
2222d30c739cSEd Maste  */
2223d30c739cSEd Maste static int
muge_detach(device_t dev)2224d30c739cSEd Maste muge_detach(device_t dev)
2225d30c739cSEd Maste {
2226d30c739cSEd Maste 
2227d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
2228d30c739cSEd Maste 	struct usb_ether *ue = &sc->sc_ue;
2229d30c739cSEd Maste 
2230d30c739cSEd Maste 	usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER);
2231d30c739cSEd Maste 	uether_ifdetach(ue);
2232d30c739cSEd Maste 	mtx_destroy(&sc->sc_mtx);
2233d30c739cSEd Maste 
2234d30c739cSEd Maste 	return (0);
2235d30c739cSEd Maste }
2236d30c739cSEd Maste 
2237d30c739cSEd Maste static device_method_t muge_methods[] = {
2238d30c739cSEd Maste 	/* Device interface */
2239d30c739cSEd Maste 	DEVMETHOD(device_probe, muge_probe),
2240d30c739cSEd Maste 	DEVMETHOD(device_attach, muge_attach),
2241d30c739cSEd Maste 	DEVMETHOD(device_detach, muge_detach),
2242d30c739cSEd Maste 
2243d30c739cSEd Maste 	/* Bus interface */
2244d30c739cSEd Maste 	DEVMETHOD(bus_print_child, bus_generic_print_child),
2245d30c739cSEd Maste 	DEVMETHOD(bus_driver_added, bus_generic_driver_added),
2246d30c739cSEd Maste 
2247d30c739cSEd Maste 	/* MII interface */
2248d30c739cSEd Maste 	DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg),
2249d30c739cSEd Maste 	DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg),
2250d30c739cSEd Maste 	DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg),
2251d30c739cSEd Maste 
2252d30c739cSEd Maste 	DEVMETHOD_END
2253d30c739cSEd Maste };
2254d30c739cSEd Maste 
2255d30c739cSEd Maste static driver_t muge_driver = {
2256d30c739cSEd Maste 	.name = "muge",
2257d30c739cSEd Maste 	.methods = muge_methods,
2258d30c739cSEd Maste 	.size = sizeof(struct muge_softc),
2259d30c739cSEd Maste };
2260d30c739cSEd Maste 
2261bc9372d7SJohn Baldwin DRIVER_MODULE(muge, uhub, muge_driver, NULL, NULL);
22623e38757dSJohn Baldwin DRIVER_MODULE(miibus, muge, miibus_driver, NULL, NULL);
2263d30c739cSEd Maste MODULE_DEPEND(muge, uether, 1, 1, 1);
2264d30c739cSEd Maste MODULE_DEPEND(muge, usb, 1, 1, 1);
2265d30c739cSEd Maste MODULE_DEPEND(muge, ether, 1, 1, 1);
2266d30c739cSEd Maste MODULE_DEPEND(muge, miibus, 1, 1, 1);
2267d30c739cSEd Maste MODULE_VERSION(muge, 1);
2268d30c739cSEd Maste USB_PNP_HOST_INFO(lan78xx_devs);
2269