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Searched refs:Div (Results 1 – 25 of 70) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp406 bool llvm::expandDivision(BinaryOperator *Div) { in expandDivision() argument
407 assert((Div->getOpcode() == Instruction::SDiv || in expandDivision()
408 Div->getOpcode() == Instruction::UDiv) && in expandDivision()
411 IRBuilder<> Builder(Div); in expandDivision()
413 assert(!Div->getType()->isVectorTy() && "Div over vectors not supported"); in expandDivision()
416 if (Div->getOpcode() == Instruction::SDiv) { in expandDivision()
418 Value *Quotient = generateSignedDivisionCode(Div->getOperand(0), in expandDivision()
419 Div->getOperand(1), Builder); in expandDivision()
422 bool IsInsertPoint = Div->getIterator() == Builder.GetInsertPoint(); in expandDivision()
423 Div->replaceAllUsesWith(Quotient); in expandDivision()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegBankLegalizeRules.cpp259 return MUI.isUniform(Reg) ? Uni[Slot] : Div[Slot]; in findMappingForMI()
280 Div[Slot] = RuleApplyIDs; in addFastRuleDivergent()
471 .Div(S32, {{Vgpr32}, {Vgpr32, Vgpr32}}); in RegBankLegalizeRules()
473 addRulesForGOpcs({G_MUL}, Standard).Div(S32, {{Vgpr32}, {Vgpr32, Vgpr32}}); in RegBankLegalizeRules()
481 .Div(B32, {{VgprB32}, {VgprB32, VgprB32}}) in RegBankLegalizeRules()
483 .Div(B64, {{VgprB64}, {VgprB64, VgprB64}, SplitTo32}); in RegBankLegalizeRules()
487 .Div(S16, {{Vgpr16}, {Vgpr16, Vgpr16}}) in RegBankLegalizeRules()
489 .Div(V2S16, {{VgprV2S16}, {VgprV2S16, VgprV2S16}}) in RegBankLegalizeRules()
492 .Div(S32, {{Vgpr32}, {Vgpr32, Vgpr32}}) in RegBankLegalizeRules()
493 .Div(S64, {{Vgpr64}, {Vgpr64, Vgpr32}}); in RegBankLegalizeRules()
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H A DAMDGPURegBankLegalizeRules.h267 RegBankLLTMapping Div[4] = {InvMapping, InvMapping, InvMapping, InvMapping}; variable
330 RuleSetInitializer &Div(UniformityLLTOpPredicateID Ty,
H A DAMDGPUCodeGenPrepare.cpp1317 Value *Div = Builder.CreateAdd(IQ, JQ); in expandDivRem24Impl() local
1319 Value *Res = Div; in expandDivRem24Impl()
1322 Value *Rem = Builder.CreateMul(Div, Den); in expandDivRem24Impl()
1717 for (BinaryOperator *Div : Div64ToExpand) { in visitBinaryOperator()
1718 expandDivRem64(*Div); in visitBinaryOperator()
H A DAMDGPUISelLowering.cpp2056 SDValue Div = DAG.getNode(ISD::ADD, DL, VT, iq, jq); in LowerDIVREM24() local
2059 SDValue Rem = DAG.getNode(ISD::MUL, DL, VT, Div, RHS); in LowerDIVREM24()
2066 Div = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Div, InRegSize); in LowerDIVREM24()
2070 Div = DAG.getNode(ISD::AND, DL, VT, Div, TruncMask); in LowerDIVREM24()
2074 return DAG.getMergeValues({ Div, Rem }, DL); in LowerDIVREM24()
2237 SDValue Div = DAG.getSelectCC(DL, C3, Zero, Sel1, Mulhi3, ISD::SETNE); in LowerUDIVREM64() local
2242 Results.push_back(Div); in LowerUDIVREM64()
2390 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS); in LowerSDIVREM() local
2391 SDValue Rem = Div.getValue(1); in LowerSDIVREM()
2393 Div = DAG.getNode(ISD::XOR, DL, VT, Div, DSign); in LowerSDIVREM()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DIntegerDivision.h43 LLVM_ABI bool expandDivision(BinaryOperator *Div);
64 LLVM_ABI bool expandDivisionUpTo32Bits(BinaryOperator *Div);
70 LLVM_ABI bool expandDivisionUpTo64Bits(BinaryOperator *Div);
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.cpp396 int64_t Div = 0; in generateInstSeq() local
401 Div = 3; in generateInstSeq()
404 Div = 5; in generateInstSeq()
407 Div = 9; in generateInstSeq()
411 if (Div > 0) { in generateInstSeq()
412 generateInstSeqImpl(Val / Div, STI, TmpSeq); in generateInstSeq()
421 Div = 0; in generateInstSeq()
423 Div = 3; in generateInstSeq()
426 Div = 5; in generateInstSeq()
429 Div = 9; in generateInstSeq()
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A DNVPTX.cpp156 const unsigned Div = std::min<unsigned>(MaxSize, Alignment); in coerceToIntArrayWithLimit() local
157 llvm::Type *IntType = llvm::Type::getIntNTy(getVMContext(), Div); in coerceToIntArrayWithLimit()
158 const uint64_t NumElements = (Size + Div - 1) / Div; in coerceToIntArrayWithLimit()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DDivRemPairs.cpp56 Instruction *Div; in matchExpandedRem() local
61 m_Instruction(Div)), in matchExpandedRem()
66 M.Key.SignedOp = Div->getOpcode() == Instruction::SDiv; in matchExpandedRem()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp419 BinaryOperator *Div = dyn_cast<BinaryOperator>(Op0); in visitMul() local
420 if (!Div || (Div->getOpcode() != Instruction::UDiv && in visitMul()
421 Div->getOpcode() != Instruction::SDiv)) { in visitMul()
423 Div = dyn_cast<BinaryOperator>(Op1); in visitMul()
426 if (Div && Div->hasOneUse() && in visitMul()
427 (Div->getOperand(1) == Y || Div->getOperand(1) == Neg) && in visitMul()
428 (Div->getOpcode() == Instruction::UDiv || in visitMul()
429 Div->getOpcode() == Instruction::SDiv)) { in visitMul()
430 Value *X = Div->getOperand(0), *DivOp1 = Div->getOperand(1); in visitMul()
433 if (Div->isExact()) { in visitMul()
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H A DInstCombineAddSub.cpp1184 Value *Div, *Rem; in SimplifyAddWithRemainder() local
1186 if (!LHS->hasOneUse() || !MatchMul(LHS, Div, C1)) in SimplifyAddWithRemainder()
1187 Div = LHS, C1 = APInt(I.getType()->getScalarSizeInBits(), 1); in SimplifyAddWithRemainder()
1190 if (match(Div, m_IRem(m_Value(), m_Value()))) { in SimplifyAddWithRemainder()
1191 std::swap(Div, Rem); in SimplifyAddWithRemainder()
1197 MatchDiv(Div, DivOpV, DivOpC, IsSigned) && X == DivOpV && C0 == DivOpC && in SimplifyAddWithRemainder()
1209 Builder.CreateMul(Div, ConstantInt::get(X->getType(), NewC)), MulXC2); in SimplifyAddWithRemainder()
H A DInstCombineCompares.cpp2288 APInt Div, Rem; in foldICmpShlLHSC() local
2289 APInt::udivrem(C, *C2, Div, Rem); in foldICmpShlLHSC()
2290 bool CIsPowerOf2 = Rem.isZero() && Div.isPowerOf2(); in foldICmpShlLHSC()
2304 unsigned CLog2 = Div.logBase2(); in foldICmpShlLHSC()
2785 BinaryOperator *Div, in foldICmpDivConstant() argument
2788 Value *X = Div->getOperand(0); in foldICmpDivConstant()
2789 Value *Y = Div->getOperand(1); in foldICmpDivConstant()
2790 Type *Ty = Div->getType(); in foldICmpDivConstant()
2791 bool DivIsSigned = Div->getOpcode() == Instruction::SDiv; in foldICmpDivConstant()
2801 if (Cmp.isEquality() && Div->hasOneUse() && C.isSignBitSet() && in foldICmpDivConstant()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedThunderX.td43 def THXT8XUnitFPMDS : ProcResource<1> { let BufferSize = 0; } // FP Mul/Div/Sqrt
70 // Div
161 // FP Mul, Div, Sqrt
238 // Div
H A DAArch64SchedA53.td48 def A53UnitFPMDS : ProcResource<1> { let BufferSize = 0; } // FP Mult/Div/Sqrt
72 // Div
134 // FP Mul, Div, Sqrt
195 // Div
H A DAArch64SchedA55.td56 def CortexA55UnitFPDIV : ProcResource<1> { let BufferSize = 0; } // FP Div/SQRT, 64/128
77 // Div
187 // FP Mul, Div, Sqrt. Div/Sqrt are not pipelined
252 // Div
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMVETailPredication.cpp327 const SCEV *Div = SE->getUDivExpr( in IsSafeActiveMask() local
331 const SCEV *Sub = SE->getMinusSCEV(SE->getBackedgeTakenCount(L), Div); in IsSafeActiveMask()
H A DARMScheduleM4.td105 // Most FP instructions are single-cycle latency, except MAC's, Div's and Sqrt's.
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCExpr.cpp151 case MCBinaryExpr::Div: OS << '/'; break; in print()
642 case MCBinaryExpr::Div: in evaluateAsRelocatableImpl()
652 if (ABE->getOpcode() == MCBinaryExpr::Div) in evaluateAsRelocatableImpl()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCExpr.h304 Div, ///< Signed division. enumerator
355 return create(Div, LHS, RHS, Ctx); in createDiv()
/freebsd/contrib/llvm-project/clang/include/clang/AST/
H A DCommentHTMLTags.td20 def Div : Tag<"div">;
H A DStmtVisitor.h129 BINOP_FALLBACK(Mul) BINOP_FALLBACK(Div) BINOP_FALLBACK(Rem) in BINOP_FALLBACK()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZHLASMAsmStreamer.cpp242 case MCBinaryExpr::Div: in emitHLASMValueImpl()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DLoopCacheAnalysis.cpp443 const SCEV *Div = SE.getUDivExactExpr(AccessFn, ElemSize); in delinearize() local
444 Subscripts.push_back(Div); in delinearize()
H A DBranchProbabilityInfo.cpp497 uint32_t Div = static_cast<uint32_t>( in calcMetadataWeights() local
499 BP[I] = BranchProbability::getRaw(Div); in calcMetadataWeights()
/freebsd/contrib/llvm-project/clang/lib/CIR/CodeGen/
H A DCIRGenExprScalar.cpp832 HANDLEBINOP(Div) in HANDLEBINOP() argument
1145 HANDLE_BINOP(Div) in emitPromoted()
1199 COMPOUND_OP(Div); in emitCompoundAssignmentLValue()
1451 cir::BinOpKind::Div, ops.lhs, ops.rhs); in emitDiv()

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