| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | VectorUtils.cpp | 314 APInt &DemandedRHS, bool AllowUndefElts) { in getShuffleDemandedElts() argument
315 DemandedLHS = DemandedRHS = APInt::getZero(SrcWidth); in getShuffleDemandedElts()
343 DemandedRHS.setBit(M - SrcWidth); in getShuffleDemandedElts()
573 APInt &DemandedRHS) { in getHorizDemandedEltsForFirstOperand() argument
581 DemandedRHS = APInt::getZero(NumElts); in getHorizDemandedEltsForFirstOperand()
593 DemandedRHS.setBit(LaneIdx + 2 * LocalIdx); in getHorizDemandedEltsForFirstOperand()
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| H A D | ValueTracking.cpp | 137 APInt &DemandedLHS, APInt &DemandedRHS) { in getShuffleDemandedElts() argument
140 DemandedLHS = DemandedRHS = DemandedElts; in getShuffleDemandedElts()
147 DemandedElts, DemandedLHS, DemandedRHS); in getShuffleDemandedElts()
1879 APInt DemandedLHS, DemandedRHS; in computeKnownBitsFromOperator() local
1880 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) { in computeKnownBitsFromOperator()
1893 if (!!DemandedRHS) { in computeKnownBitsFromOperator()
1895 computeKnownBits(RHS, DemandedRHS, Known2, Depth + 1, Q); in computeKnownBitsFromOperator()
3013 APInt DemandedLHS, DemandedRHS; in isKnownNonZeroFromOperator() local
3016 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) in isKnownNonZeroFromOperator()
3019 return (DemandedRHS.isZero() || in isKnownNonZeroFromOperator()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | VectorUtils.h | 194 APInt &DemandedRHS, bool AllowUndefElts = false);
273 APInt &DemandedRHS);
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 1736 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
1750 DemandedRHS.clearBit(i); in SimplifyDemandedVectorElts()
1755 simplifyAndSetOp(I, 2, DemandedRHS, PoisonElts3); in SimplifyDemandedVectorElts()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 2822 APInt DemandedRHS = APInt::getZero(NumElts); in isSplatValue() local
2835 DemandedRHS.setBit(M - NumElts); in isSplatValue()
2840 if ((DemandedLHS.isZero() && DemandedRHS.isZero()) || in isSplatValue()
2841 (!DemandedLHS.isZero() && !DemandedRHS.isZero())) in isSplatValue()
2855 return CheckSplatSrc(V.getOperand(1), DemandedRHS); in isSplatValue()
3251 APInt DemandedLHS, DemandedRHS; in computeKnownBits() local
3255 DemandedLHS, DemandedRHS)) in computeKnownBits()
3268 if (!!DemandedRHS) { in computeKnownBits()
3270 Known2 = computeKnownBits(RHS, DemandedRHS, Depth + 1); in computeKnownBits()
4522 APInt DemandedLHS, DemandedRHS; in ComputeNumSignBits() local
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| H A D | TargetLowering.cpp | 1350 APInt DemandedLHS, DemandedRHS; in SimplifyDemandedBits() local
1352 DemandedRHS)) in SimplifyDemandedBits()
1355 if (!!DemandedLHS || !!DemandedRHS) { in SimplifyDemandedBits()
1367 if (!!DemandedRHS) { in SimplifyDemandedBits()
1368 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedRHS, Known2, TLO, in SimplifyDemandedBits()
1378 Op1, DemandedBits, DemandedRHS, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
3424 APInt DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
3430 if (SimplifyDemandedVectorElts(RHS, DemandedRHS, UndefRHS, ZeroRHS, TLO, in SimplifyDemandedVectorElts()
3454 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedVectorElts() local
3463 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedVectorElts()
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| H A D | DAGCombiner.cpp | 26020 APInt DemandedRHS = APInt::getZero(NumElts); in visitVECTOR_SHUFFLE() local
26028 APInt &Demanded = M < (int)NumElts ? DemandedLHS : DemandedRHS; in visitVECTOR_SHUFFLE()
26033 if (!IsInLaneMask && (!DemandedLHS.isZero() || !DemandedRHS.isZero()) && in visitVECTOR_SHUFFLE()
26035 (DemandedRHS.isZero() || DAG.MaskedVectorIsZero(N1, DemandedRHS))) { in visitVECTOR_SHUFFLE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3737 SDValue DemandedRHS = TLI.SimplifyMultipleUseDemandedBits(RHS, Demanded, DAG); in simplifyMul24() local
3738 if (DemandedLHS || DemandedRHS) in simplifyMul24()
3741 DemandedRHS ? DemandedRHS : RHS); in simplifyMul24()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 5187 APInt &DemandedLHS, APInt &DemandedRHS) { in getPackDemandedElts() argument
5195 DemandedRHS = APInt::getZero(NumInnerElts); in getPackDemandedElts()
5205 DemandedRHS.setBit(InnerIdx); in getPackDemandedElts()
5212 APInt &DemandedLHS, APInt &DemandedRHS) { in getHorizDemandedElts() argument
5214 DemandedLHS, DemandedRHS); in getHorizDemandedElts()
5216 DemandedRHS |= DemandedRHS << 1; in getHorizDemandedElts()
37276 APInt DemandedLHS, DemandedRHS; in computeKnownBitsForTargetNode() local
37277 getPackDemandedElts(VT, DemandedElts, DemandedLHS, DemandedRHS); in computeKnownBitsForTargetNode()
37287 if (!!DemandedRHS) { in computeKnownBitsForTargetNode()
37288 Known2 = DAG.computeKnownBits(Op.getOperand(1), DemandedRHS, Depth + 1); in computeKnownBitsForTargetNode()
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