| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | GISelValueTracking.cpp | 651 APInt DemandedLHS, DemandedRHS; in computeKnownBitsImpl() local
656 DemandedElts, DemandedLHS, DemandedRHS)) in computeKnownBitsImpl()
670 if (!!DemandedRHS) { in computeKnownBitsImpl()
671 computeKnownBitsImpl(MI.getOperand(2).getReg(), Known2, DemandedRHS, in computeKnownBitsImpl()
1658 APInt DemandedLHS, DemandedRHS; in computeKnownFPClass() local
1661 DemandedLHS = DemandedRHS = DemandedElts; in computeKnownFPClass()
1665 DemandedRHS)) { in computeKnownFPClass()
1683 if (!!DemandedRHS) { in computeKnownFPClass()
1686 computeKnownFPClass(RHS, DemandedRHS, InterestedClasses, Known2, in computeKnownFPClass()
1989 APInt DemandedLHS, DemandedRHS; in computeNumSignBits() local
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | VectorUtils.cpp | 461 APInt &DemandedRHS, bool AllowUndefElts) { in getShuffleDemandedElts() argument
462 DemandedLHS = DemandedRHS = APInt::getZero(SrcWidth); in getShuffleDemandedElts()
490 DemandedRHS.setBit(M - SrcWidth); in getShuffleDemandedElts()
790 APInt &DemandedRHS) { in getHorizDemandedEltsForFirstOperand() argument
798 DemandedRHS = APInt::getZero(NumElts); in getHorizDemandedEltsForFirstOperand()
810 DemandedRHS.setBit(LaneIdx + 2 * LocalIdx); in getHorizDemandedEltsForFirstOperand()
|
| H A D | ValueTracking.cpp | 121 APInt &DemandedLHS, APInt &DemandedRHS) { in getShuffleDemandedElts() argument
124 DemandedLHS = DemandedRHS = DemandedElts; in getShuffleDemandedElts()
131 DemandedElts, DemandedLHS, DemandedRHS); in getShuffleDemandedElts()
2052 APInt DemandedLHS, DemandedRHS; in computeKnownBitsFromOperator() local
2053 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) { in computeKnownBitsFromOperator()
2066 if (!!DemandedRHS) { in computeKnownBitsFromOperator()
2068 computeKnownBits(RHS, DemandedRHS, Known2, Q, Depth + 1); in computeKnownBitsFromOperator()
3240 APInt DemandedLHS, DemandedRHS; in isKnownNonZeroFromOperator() local
3243 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) in isKnownNonZeroFromOperator()
3246 return (DemandedRHS.isZero() || in isKnownNonZeroFromOperator()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | VectorUtils.h | 220 APInt &DemandedLHS, APInt &DemandedRHS,
318 APInt &DemandedRHS);
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 1740 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
1749 DemandedRHS.clearBit(i); in SimplifyDemandedVectorElts()
1754 simplifyAndSetOp(I, 2, DemandedRHS, PoisonElts3); in SimplifyDemandedVectorElts()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 3070 APInt DemandedRHS = APInt::getZero(NumElts); in isSplatValue() local
3083 DemandedRHS.setBit(M - NumElts); in isSplatValue()
3088 if ((DemandedLHS.isZero() && DemandedRHS.isZero()) || in isSplatValue()
3089 (!DemandedLHS.isZero() && !DemandedRHS.isZero())) in isSplatValue()
3103 return CheckSplatSrc(V.getOperand(1), DemandedRHS); in isSplatValue()
3494 APInt DemandedLHS, DemandedRHS; in computeKnownBits() local
3498 DemandedLHS, DemandedRHS)) in computeKnownBits()
3511 if (!!DemandedRHS) { in computeKnownBits()
3513 Known2 = computeKnownBits(RHS, DemandedRHS, Depth + 1); in computeKnownBits()
4793 APInt DemandedLHS, DemandedRHS; in ComputeNumSignBits() local
[all …]
|
| H A D | TargetLowering.cpp | 1405 APInt DemandedLHS, DemandedRHS; in SimplifyDemandedBits() local
1407 DemandedRHS)) in SimplifyDemandedBits()
1410 if (!!DemandedLHS || !!DemandedRHS) { in SimplifyDemandedBits()
1422 if (!!DemandedRHS) { in SimplifyDemandedBits()
1423 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedRHS, Known2, TLO, in SimplifyDemandedBits()
1433 Op1, DemandedBits, DemandedRHS, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
3565 APInt DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
3571 if (SimplifyDemandedVectorElts(RHS, DemandedRHS, UndefRHS, ZeroRHS, TLO, in SimplifyDemandedVectorElts()
3595 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedVectorElts() local
3604 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedVectorElts()
[all …]
|
| H A D | DAGCombiner.cpp | 27112 APInt DemandedRHS = APInt::getZero(NumElts); in visitVECTOR_SHUFFLE() local
27120 APInt &Demanded = M < (int)NumElts ? DemandedLHS : DemandedRHS; in visitVECTOR_SHUFFLE()
27125 if (!IsInLaneMask && (!DemandedLHS.isZero() || !DemandedRHS.isZero()) && in visitVECTOR_SHUFFLE()
27127 (DemandedRHS.isZero() || DAG.MaskedVectorIsZero(N1, DemandedRHS))) { in visitVECTOR_SHUFFLE()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3801 SDValue DemandedRHS = TLI.SimplifyMultipleUseDemandedBits(RHS, Demanded, DAG); in simplifyMul24() local
3802 if (DemandedLHS || DemandedRHS) in simplifyMul24()
3805 DemandedRHS ? DemandedRHS : RHS); in simplifyMul24()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 5482 APInt &DemandedLHS, APInt &DemandedRHS) { in getPackDemandedElts() argument
5490 DemandedRHS = APInt::getZero(NumInnerElts); in getPackDemandedElts()
5500 DemandedRHS.setBit(InnerIdx); in getPackDemandedElts()
5507 APInt &DemandedLHS, APInt &DemandedRHS) { in getHorizDemandedElts() argument
5509 DemandedLHS, DemandedRHS); in getHorizDemandedElts()
5511 DemandedRHS |= DemandedRHS << 1; in getHorizDemandedElts()
38686 APInt DemandedLHS, DemandedRHS; in computeKnownBitsForTargetNode() local
38687 getPackDemandedElts(VT, DemandedElts, DemandedLHS, DemandedRHS); in computeKnownBitsForTargetNode()
38697 if (!!DemandedRHS) { in computeKnownBitsForTargetNode()
38698 Known2 = DAG.computeKnownBits(Op.getOperand(1), DemandedRHS, Depth + 1); in computeKnownBitsForTargetNode()
[all …]
|