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Searched refs:DefInstr (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineCombiner.cpp154 MachineInstr *DefInstr = nullptr; in getOperandDef() local
157 DefInstr = MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
158 return DefInstr; in getOperandDef()
228 MachineInstr *DefInstr = InsInstrs[II->second]; in getDepth() local
229 assert(DefInstr && in getDepth()
233 DefInstr->findRegisterDefOperandIdx(MO.getReg(), /*TRI=*/nullptr); in getDepth()
236 LatencyOp = TSchedModel.computeOperandLatency(DefInstr, DefIdx, in getDepth()
239 MachineInstr *DefInstr = getOperandDef(MO); in getDepth() local
240 if (DefInstr && (TII->getMachineCombinerTraceStrategy() != in getDepth()
242 DefInstr->getParent() == &MBB)) { in getDepth()
[all …]
H A DLiveRangeShrink.cpp201 MachineInstr &DefInstr = *MRI.def_instr_begin(Reg); in runOnMachineFunction()
202 if (!TII.isCopyInstr(DefInstr)) in runOnMachineFunction()
204 Insert = FindDominatedInstruction(DefInstr, Insert, IOM); in runOnMachineFunction()
199 MachineInstr &DefInstr = *MRI.def_instr_begin(Reg); runOnMachineFunction() local
H A DMachineUniformityAnalysis.cpp145 auto *DefInstr = Def->getParent(); in isDivergentUse() local
147 return isTemporalDivergent(*UseInstr->getParent(), *DefInstr); in isDivergentUse()
H A DScheduleDAGInstrs.cpp317 MachineInstr *DefInstr = DefSU->getInstr(); in addPhysRegDeps() local
318 MachineOperand &DefMO = DefInstr->getOperand(I->OpIdx); in addPhysRegDeps()
324 SchedModel.computeOutputLatency(MI, OperIdx, DefInstr)); in addPhysRegDeps()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DUniformityAnalysis.cpp99 if (const auto *DefInstr = dyn_cast<Instruction>(V)) { in isDivergentUse() local
101 return isTemporalDivergent(*UseInstr->getParent(), *DefInstr); in isDivergentUse()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIWholeQuadMode.cpp1554 MachineInstr *DefInstr = MRI->getVRegDef(InputReg); in lowerInitExec() local
1555 assert(DefInstr && DefInstr->isCopy()); in lowerInitExec()
1556 if (DefInstr->getParent() == MBB) { in lowerInitExec()
1557 if (DefInstr != FirstMI) { in lowerInitExec()
1560 DefInstr->removeFromParent(); in lowerInitExec()
1561 MBB->insert(FirstMI, DefInstr); in lowerInitExec()
1563 LIS->handleMove(*DefInstr); in lowerInitExec()
H A DAMDGPUMachineCFGStructurizer.cpp327 MachineInstr *DefInstr, const MachineRegisterInfo *MRI,
331 MachineInstr *DefInstr,
673 MachineInstr *DefInstr, in storeLiveOutReg() argument
700 if ((&(*MII)) == DefInstr) { in storeLiveOutReg()
713 MachineInstr *DefInstr, in storeLiveOutRegRegion() argument
1928 MachineInstr *DefInstr = getDefInstr(SourceReg); in insertChainedPHI() local
1929 if (DefInstr->isPHI() && DefInstr->getParent() == CodeBB && IsSingleBB) { in insertChainedPHI()
1938 storePHILinearizationInfoDest(DestReg, *DefInstr); in insertChainedPHI()
1942 DefInstr->eraseFromParent(); in insertChainedPHI()
1945 if (IsSingleBB && DefInstr->getParent() == InnerRegion->getEntry()) { in insertChainedPHI()
H A DSIPeepholeSDWA.cpp299 MachineInstr *DefInstr = MRI->getUniqueVRegDef(Reg->getReg()); in findSingleRegDef() local
300 if (!DefInstr) in findSingleRegDef()
303 for (auto &DefMO : DefInstr->defs()) { in findSingleRegDef()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVPreLegalizer.cpp254 if (MachineInstr *DefInstr = in propagateSPIRVType() local
256 if (SPIRVType *Def = propagateSPIRVType(DefInstr, GR, MRI, MIB)) { in propagateSPIRVType()
H A DSPIRVBuiltins.cpp2003 MachineInstr *DefInstr = MRI->getUniqueVRegDef(GlobalWorkSize); in buildNDRange() local
2004 assert(DefInstr && isSpvIntrinsic(*DefInstr, Intrinsic::spv_gep) && in buildNDRange()
2005 DefInstr->getOperand(3).isReg()); in buildNDRange()
2006 Register GWSPtr = DefInstr->getOperand(3).getReg(); in buildNDRange()