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Searched refs:DefCycle (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DUniformityAnalysis.cpp67 const Instruction &I, const Cycle &DefCycle) const { in usesValueFromCycle()
71 if (DefCycle.contains(I->getParent())) in usesValueFromCycle()
81 const Cycle &DefCycle) { in propagateTemporalDivergence() argument
84 if (DefCycle.contains(UserInstr->getParent())) in propagateTemporalDivergence()
87 recordTemporalDivergence(&I, UserInstr, &DefCycle); in propagateTemporalDivergence()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineUniformityAnalysis.cpp93 const MachineInstr &I, const MachineCycle &DefCycle) const { in usesValueFromCycle()
106 if (DefCycle.contains(Def->getParent())) in usesValueFromCycle()
115 const MachineCycle &DefCycle) { in propagateTemporalDivergence() argument
122 if (DefCycle.contains(UserInstr.getParent())) in propagateTemporalDivergence()
126 recordTemporalDivergence(Reg, &UserInstr, &DefCycle); in propagateTemporalDivergence()
H A DWindowScheduler.cpp498 int DefCycle = getOriCycle(&MI); in calculateStallCycle() local
503 if (DefCycle + (int)Succ.getLatency() <= CurrentII) in calculateStallCycle()
510 if (DefCycle < UseCycle) in calculateStallCycle()
513 int StallCycle = DefCycle + (int)Succ.getLatency() - CurrentII - UseCycle; in calculateStallCycle()
H A DTargetInstrInfo.cpp1834 std::optional<unsigned> DefCycle = in hasLowDefLatency() local
1836 return DefCycle && DefCycle <= 1U; in hasLowDefLatency()
H A DModuloSchedule.cpp1226 int DefCycle = Schedule.getCycle(&Phi); in isLoopCarried() local
1237 return (LoopCycle > DefCycle) || (LoopStage <= DefStage); in isLoopCarried()
H A DMachinePipeliner.cpp3440 unsigned DefCycle = cycleScheduled(DefSU); in isLoopCarried() local
3453 return (LoopCycle > DefCycle) || (LoopStage <= DefStage); in isLoopCarried()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrItineraries.h214 std::optional<unsigned> DefCycle = getOperandCycle(DefClass, DefIdx); in getOperandLatency()
216 if (!DefCycle || !UseCycle) in getOperandLatency()
219 if (UseCycle > *DefCycle + 1) in getOperandLatency()
222 UseCycle = *DefCycle - *UseCycle + 1; in getOperandLatency()
210 int DefCycle = getOperandCycle(DefClass, DefIdx); getOperandLatency() local
/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A DGenericUniformityImpl.h469 void analyzeCycleExitDivergence(const CycleT &DefCycle);
473 const CycleT &DefCycle);
479 bool usesValueFromCycle(const InstructionT &I, const CycleT &DefCycle) const;
847 const CycleT &DefCycle) { in analyzeCycleExitDivergence() argument
849 DefCycle.getExitBlocks(Exits); in analyzeCycleExitDivergence()
852 if (usesValueFromCycle(Phi, DefCycle)) { in analyzeCycleExitDivergence()
858 for (auto *BB : DefCycle.blocks()) { in analyzeCycleExitDivergence()
863 propagateTemporalDivergence(II, DefCycle); in analyzeCycleExitDivergence()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp3728 unsigned DefCycle; in getVLDMDefCycle() local
3731 DefCycle = RegNo / 2 + 1; in getVLDMDefCycle()
3733 ++DefCycle; in getVLDMDefCycle()
3735 DefCycle = RegNo; in getVLDMDefCycle()
3750 ++DefCycle; in getVLDMDefCycle()
3753 DefCycle = RegNo + 2; in getVLDMDefCycle()
3756 return DefCycle; in getVLDMDefCycle()
3768 unsigned DefCycle; in getLDMDefCycle() local
3772 DefCycle = RegNo / 2; in getLDMDefCycle()
3773 if (DefCycle < 1) in getLDMDefCycle()
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