| /freebsd/contrib/wpa/wpa_supplicant/ |
| H A D | README-DPP | 1 Device Provisioning Protocol (DPP) 4 This document describes how the Device Provisioning Protocol (DPP) 6 the STA device and AP can be configured to connect each other using DPP 9 Introduction to DPP 15 authentication (password with in-band provisioning), etc. In DPP a 17 three phases of DPP connection are authentication, configuration and 33 Enable DPP in wpa_supplicant build config file 40 Enable DPP in hostapd build config file 47 Any STA or AP device can act as a Configurator. Enable DPP in build 72 wpa_key_mgmt=DPP [all …]
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| H A D | defconfig | 644 # Device Provisioning Protocol (DPP) (also known as Wi-Fi Easy Connect) 646 # DPP version 2 support 648 # DPP version 3 support (experimental and still changing; do not enable for
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| H A D | ChangeLog | 5 - add support for DPP release 3 77 * added support for DPP release 2 (Wi-Fi Device Provisioning Protocol) 121 * fixed DPP bootstrapping URI parser of channel list 172 * fixed DPP network profile saving 215 * added support for DPP (Wi-Fi Device Provisioning Protocol)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUAtomicOptimizer.cpp | 235 if (ScanImpl == ScanOptions::DPP && !ST.hasDPP()) in visitAtomicRMWInst() 319 if (ScanImpl == ScanOptions::DPP && !ST.hasDPP()) in visitIntrinsicInst() 398 {Identity, V, B.getInt32(DPP::ROW_XMASK0 | 1 << Idx), in buildReduction() 443 {Identity, V, B.getInt32(DPP::ROW_SHR0 | 1 << Idx), in buildScan() 451 {Identity, V, B.getInt32(DPP::BCAST15), B.getInt32(0xa), in buildScan() 456 {Identity, V, B.getInt32(DPP::BCAST31), B.getInt32(0xc), in buildScan() 471 UpdateDPP, {Identity, PermX, B.getInt32(DPP::QUAD_PERM_ID), in buildScan() 481 UpdateDPP, {Identity, Lane31, B.getInt32(DPP::QUAD_PERM_ID), in buildScan() 501 {Identity, V, B.getInt32(DPP::WAVE_SHR1), B.getInt32(0xf), in buildShiftRight() 513 {Identity, V, B.getInt32(DPP::ROW_SHR0 + 1), in buildShiftRight() [all …]
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| H A D | SIDefines.h | 77 DPP = 1 << 15, enumerator 319 DPP = 4, enumerator 918 namespace DPP {
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| H A D | GCNHazardRecognizer.h | 84 int checkDPPHazards(MachineInstr *DPP);
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| H A D | VOPInstructions.td | 873 // Common refers to common between DPP and DPP8 978 let DPP = 1; 992 let AsmVariantName = !if(P.HasExtDPP, AMDGPUAsmVariants.DPP, 1015 let DPP = 1; 1059 let DPP = 1; 1064 let AsmVariantName = !if(P.HasExtDPP, AMDGPUAsmVariants.DPP, 1179 let DPP = 1; 1184 let AsmVariantName = AMDGPUAsmVariants.DPP; 1619 // VOP3 DPP 2101 def VOPC64DPPTable : VOPC64Table<"DPP">;
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| H A D | SIInstrFormats.td | 35 field bit DPP = 0; 180 let TSFlags{15} = DPP;
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| H A D | AMDGPU.td | 631 "Support DPP (Data Parallel Primitives) extension" 644 "Support DPP (Data Parallel Primitives) extension in DP ALU" 650 "Support SGPR for Src1 of DPP instructions" 2029 string DPP = "DPP"; 2059 let Name = AMDGPUAsmVariants.DPP;
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| H A D | AMDGPU.h | 103 enum class ScanOptions { DPP, Iterative, None }; enumerator
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| H A D | SIInstrInfo.td | 1899 // Src2 of VOP3 DPP instructions cannot be a literal 1961 // Return type of input modifiers operand specified input operand for DPP 1975 // Return type of input modifiers operand for specified input operand for DPP 1989 // Return type of input modifiers operand for specified input operand for DPP 2269 // Outs for DPP 2502 0, // NumSrcArgs == 3 - No DPP for VOP3 2518 // Function that checks if instruction supports DPP and SDWA 2546 0, // 64-bit dst No DPP for 64-bit operands 3117 // Maps ordinary instructions to their DPP counterparts 3123 let ValueCols = [["DPP"]];
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| H A D | SIInstrInfo.h | 794 return MI.getDesc().TSFlags & SIInstrFlags::DPP; in isDPP() 798 return get(Opcode).TSFlags & SIInstrFlags::DPP; in isDPP()
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| H A D | AMDGPUTargetMachine.cpp | 384 clEnumValN(ScanOptions::DPP, "DPP", "Use DPP operations for scan"), 782 .Case("dpp", ScanOptions::DPP) in parseAMDGPUAtomicOptimizerStrategy()
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| H A D | VOP1Instructions.td | 124 // We only want to set this on the basic, non-SDWA or DPP forms. 159 def : LetDummies, AMDGPUMnemonicAlias<opName#"_dpp", opName, AMDGPUAsmVariants.DPP>; 1640 /// is used for DPP operands.
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| H A D | GCNHazardRecognizer.cpp | 724 int GCNHazardRecognizer::checkDPPHazards(MachineInstr *DPP) { in checkDPPHazards() argument 736 for (const MachineOperand &Use : DPP->uses()) { in checkDPPHazards()
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| H A D | AMDGPUISelDAGToDAG.cpp | 2935 FI ? AMDGPU::DPP::DPP_FI_1 : AMDGPU::DPP::DPP_FI_0, SDLoc(), MVT::i32); in SelectINTRINSIC_WO_CHAIN()
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| H A D | VOPCInstructions.td | 62 // VOPC DPP Instructions do not need an old operand 1436 // DPP Encodings
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| H A D | AMDGPUInstructionSelector.cpp | 3742 FI.setImm(FI.getImm() ? AMDGPU::DPP::DPP_FI_1 : AMDGPU::DPP::DPP_FI_0); in selectPermlaneSwapIntrin()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 345 if (Flags & SIInstrFlags::VOP3 && Flags & SIInstrFlags::DPP) in printVOPDst() 350 } else if (Flags & SIInstrFlags::DPP) in printVOPDst() 674 return OpNo == 0 && (Desc.TSFlags & SIInstrFlags::DPP) && in needsImpliedVcc() 692 (OpNo == 1 && (Desc.TSFlags & SIInstrFlags::DPP) && ModIdx != -1)) && in printOperand() 965 using namespace AMDGPU::DPP; in printDPPCtrl() 1064 using namespace llvm::AMDGPU::DPP; in printDppFI()
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| /freebsd/contrib/wpa/hostapd/ |
| H A D | defconfig | 418 # Device Provisioning Protocol (DPP) (also known as Wi-Fi Easy Connect) 420 # DPP version 2 support 422 # DPP version 3 support (experimental and still changing; do not enable for
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| H A D | ChangeLog | 5 - add support for DPP release 3 62 * added support for DPP release 2 (Wi-Fi Device Provisioning Protocol) 95 * fixed DPP bootstrapping URI parser of channel list 156 * OWE: allow Diffie-Hellman Parameter element to be included with DPP 157 in preparation for DPP protocol extension 169 * added support for DPP (Wi-Fi Device Provisioning Protocol)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.h | 1727 return DC >= DPP::ROW_NEWBCAST_FIRST && DC <= DPP::ROW_NEWBCAST_LAST; in isLegalDPALU_DPPControl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 764 if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::DPP) { in getInstruction() 2011 if (Val != AMDGPU::DPP::DPP8_FI_0 && Val != AMDGPU::DPP::DPP8_FI_1) in decodeDpp8FI()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3603 (isForcedDPP() && !(TSFlags & SIInstrFlags::DPP)) || in checkTargetMatchPredicate() 3632 AMDGPUAsmVariants::DPP, AMDGPUAsmVariants::VOP3_DPP in getAllVariants() 3661 static const unsigned Variants[] = {AMDGPUAsmVariants::DPP}; in getMatchedVariants() 9503 using namespace AMDGPU::DPP; in isDPPCtrl() 9689 using namespace AMDGPU::DPP; in parseDPPCtrlSel() 9736 using namespace AMDGPU::DPP; in parseDPPCtrl() 9869 using namespace llvm::AMDGPU::DPP; in cvtVOP3DPP() 9938 using namespace llvm::AMDGPU::DPP; in cvtDPP()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsAMDGPU.td | 2358 // 2. DPP) 2617 // AMDGPU. It takes an old value, a source operand, a DPP control operand, a row
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