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Searched refs:DIVW (Results 1 – 11 of 11) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoM.td19 def riscv_divw : SDNode<"RISCVISD::DIVW", SDT_RISCVIntBinOpW>;
55 def DIVW : ALUW_rr<0b0000001, 0b100, "divw">,
88 def : PatGprGpr<riscv_divw, DIVW>;
127 def : PatGprGpr<sdiv, DIVW, i32, i32>;
H A DRISCVOptWInstrs.cpp157 case RISCV::DIVW: in hasAllNBitUsers()
H A DRISCVISelLowering.h76 DIVW, enumerator
H A DRISCVISelDAGToDAG.cpp3140 case RISCV::DIVW: in hasAllNBitUsers()
H A DRISCVISelLowering.cpp12147 return RISCVISD::DIVW; in getRISCVWOpcode()
17981 case RISCVISD::DIVW: in ComputeNumSignBitsForTargetNode()
20398 NODE_NAME_CASE(DIVW) in getTargetNodeName()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DRISCVInstructions.h167 R_TYPE_INST(DIVW);
279 SRLW, SRAW, MUL, MULH, MULHSU, MULHU, DIV, DIVU, REM, REMU, MULW, DIVW,
H A DEmulateInstructionRISCV.cpp479 {"DIVW", 0xFE00707F, 0x200403B, DecodeRType<DIVW>},
1086 bool operator()(DIVW inst) { in operator ()()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DP9InstrResources.td948 DIVW,
990 (instregex "DIVW(U)?(O)?_rec$")
H A DP10InstrResources.td466 DIVW,
H A DPPCInstrInfo.td2911 defm DIVW : XOForm_1rcr<31, 491, 0, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
H A DPPCISelLowering.cpp12789 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::DIVD : PPC::DIVW), Div) in emitProbedAlloca()