Searched refs:ComputeLoop (Results 1 – 2 of 2) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUAtomicOptimizer.cpp | 86 BasicBlock *ComputeLoop, BasicBlock *ComputeEnd) const; 561 Instruction &I, BasicBlock *ComputeLoop, BasicBlock *ComputeEnd) const { in buildScanIteratively() argument 571 B.SetInsertPoint(ComputeLoop); in buildScanIteratively() 599 OldValuePhi->addIncoming(OldValue, ComputeLoop); in buildScanIteratively() 604 Accumulator->addIncoming(NewAccumulator, ComputeLoop); in buildScanIteratively() 612 ActiveBits->addIncoming(NewActiveBits, ComputeLoop); in buildScanIteratively() 616 B.CreateCondBr(IsEnd, ComputeEnd, ComputeLoop); in buildScanIteratively() 748 BasicBlock *ComputeLoop = nullptr; in optimizeAtomic() local 778 ComputeLoop = BasicBlock::Create(C, "ComputeLoop", F); in optimizeAtomic() 781 ComputeLoop, ComputeEnd); in optimizeAtomic() [all …]
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H A D | SIISelLowering.cpp | 4878 auto [ComputeLoop, ComputeEnd] = splitBlockForLoop(MI, BB, true); in lowerWaveReduce() 4905 BuildMI(BB, I, DL, TII->get(AMDGPU::S_BRANCH)).addMBB(ComputeLoop); in lowerWaveReduce() 4908 I = ComputeLoop->end(); in lowerWaveReduce() 4910 BuildMI(*ComputeLoop, I, DL, TII->get(AMDGPU::PHI), AccumulatorReg) in lowerWaveReduce() 4914 BuildMI(*ComputeLoop, I, DL, TII->get(AMDGPU::PHI), ActiveBitsReg) in lowerWaveReduce() 4920 auto FF1 = BuildMI(*ComputeLoop, I, DL, TII->get(SFFOpc), FF1Reg) in lowerWaveReduce() 4922 auto LaneValue = BuildMI(*ComputeLoop, I, DL, in lowerWaveReduce() 4926 auto NewAccumulator = BuildMI(*ComputeLoop, I, DL, TII->get(Opc), DstReg) in lowerWaveReduce() 4934 BuildMI(*ComputeLoop, I, DL, TII->get(BITSETOpc), NewActiveBitsReg) in lowerWaveReduce() 4940 .addMBB(ComputeLoop); in lowerWaveReduce() [all …]
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