| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoZfa.td | 101 def FMINM_S: FPALU_rr<0b0010100, 0b010, "fminm.s", FPR32, Commutable=1>; 102 def FMAXM_S: FPALU_rr<0b0010100, 0b011, "fmaxm.s", FPR32, Commutable=1>; 122 def FMINM_D: FPALU_rr<0b0010101, 0b010, "fminm.d", FPR64, Commutable=1>; 123 def FMAXM_D: FPALU_rr<0b0010101, 0b011, "fmaxm.d", FPR64, Commutable=1>; 163 def FMINM_H: FPALU_rr<0b0010110, 0b010, "fminm.h", FPR16, Commutable=1>; 164 def FMAXM_H: FPALU_rr<0b0010110, 0b011, "fmaxm.h", FPR16, Commutable=1>; 184 def FMINM_Q: FPALU_rr<0b0010111, 0b010, "fminm.q", FPR128, Commutable=1>; 185 def FMAXM_Q: FPALU_rr<0b0010111, 0b011, "fmaxm.q", FPR128, Commutable=1>;
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| H A D | RISCVInstrInfoM.td | 33 def MUL : ALU_rr<0b0000001, 0b000, "mul", Commutable=1>, 35 def MULH : ALU_rr<0b0000001, 0b001, "mulh", Commutable=1>, 39 def MULHU : ALU_rr<0b0000001, 0b011, "mulhu", Commutable=1>, 55 def MULW : ALUW_rr<0b0000001, 0b000, "mulw", Commutable=1>,
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| H A D | RISCVInstrInfoVPseudos.td | 2126 bit Commutable = 0> { 2127 let VLMul = MInfo.value, SEW=sew, isCommutable = Commutable in { 2145 bit Commutable = 0> { 2146 let VLMul = MInfo.value, SEW=sew, isCommutable = Commutable in { 2210 multiclass VPseudoBinaryV_VV<LMULInfo m, string Constraint = "", int sew = 0, bit Commutable = 0> { 2211 …fm _VV : VPseudoBinary<m.vrclass, m.vrclass, m.vrclass, m, Constraint, sew, Commutable=Commutable>; 2214 multiclass VPseudoBinaryV_VV_RM<LMULInfo m, string Constraint = "", bit Commutable = 0> { 2216 Commutable=Commutable>; 2294 multiclass VPseudoVALU_MM<bit Commutable = 0> { 2296 let VLMul = mti.LMul.value, isCommutable = Commutable in { [all …]
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| H A D | RISCVInstrInfoF.td | 227 DAGOperand rty, bit Commutable> 230 let isCommutable = Commutable; 233 ExtInfo Ext, bit Commutable = 0> { 235 def Ext.Suffix : FPALU_rr<funct7, funct3, opcodestr, Ext.PrimaryTy, Commutable>; 241 bit Commutable> 245 let isCommutable = Commutable; 248 ExtInfo Ext, bit Commutable = 0> { 250 def Ext.Suffix : FPALU_rr_frm<funct7, opcodestr, Ext.PrimaryTy, Commutable>; 306 DAGOperand rty, bit Commutable = 0> 309 let isCommutable = Commutable; [all …]
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| H A D | RISCVInstrInfoQ.td | 67 defm FMIN_Q : FPALU_rr_m<0b0010111, 0b000, "fmin.q", Ext, Commutable = 1>; 68 defm FMAX_Q : FPALU_rr_m<0b0010111, 0b001, "fmax.q", Ext, Commutable = 1>; 90 defm FEQ_Q : FPCmp_rr_m<0b1010011, 0b010, "feq.q", Ext, Commutable = 1>;
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| H A D | RISCVInstrInfoZb.td | 275 def XNOR : ALU_rr<0b0100000, 0b100, "xnor", Commutable=1>, 382 def CLMULR : ALU_rr<0b0000101, 0b010, "clmulr", Commutable=1>, 387 def CLMUL : ALU_rr<0b0000101, 0b001, "clmul", Commutable=1>, 389 def CLMULH : ALU_rr<0b0000101, 0b011, "clmulh", Commutable=1>, 394 def MIN : ALU_rr<0b0000101, 0b100, "min", Commutable=1>, 396 def MINU : ALU_rr<0b0000101, 0b101, "minu", Commutable=1>, 398 def MAX : ALU_rr<0b0000101, 0b110, "max", Commutable=1>, 400 def MAXU : ALU_rr<0b0000101, 0b111, "maxu", Commutable=1>,
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| H A D | RISCVInstrInfoZfh.td | 123 defm FADD_H : FPALU_rr_frm_m<0b0000010, "fadd.h", Ext, Commutable=1>; 127 defm FMUL_H : FPALU_rr_frm_m<0b0001010, "fmul.h", Ext, Commutable=1>; 144 defm FMIN_H : FPALU_rr_m<0b0010110, 0b000, "fmin.h", Ext, Commutable=1>; 145 defm FMAX_H : FPALU_rr_m<0b0010110, 0b001, "fmax.h", Ext, Commutable=1>; 189 defm FEQ_H : FPCmp_rr_m<0b1010010, 0b010, "feq.h", Ext, Commutable=1>;
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| H A D | RISCVInstrInfoD.td | 91 defm FADD_D : FPALU_rr_frm_m<0b0000001, "fadd.d", Ext, Commutable=1>; 95 defm FMUL_D : FPALU_rr_frm_m<0b0001001, "fmul.d", Ext, Commutable=1>; 112 defm FMIN_D : FPALU_rr_m<0b0010101, 0b000, "fmin.d", Ext, Commutable=1>; 113 defm FMAX_D : FPALU_rr_m<0b0010101, 0b001, "fmax.d", Ext, Commutable=1>; 125 defm FEQ_D : FPCmp_rr_m<0b1010001, 0b010, "feq.d", Ext, Commutable=1>;
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| H A D | RISCVInstrInfoXRivos.td | 82 defm "" : VPseudoBinaryV_VV<m, Commutable=0>;
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| H A D | RISCVInstrInfo.td | 673 bit Commutable = 0> 676 let isCommutable = Commutable; 700 bit Commutable = 0> 703 let isCommutable = Commutable; 792 def ADD : ALU_rr<0b0000000, 0b000, "add", Commutable=1>, 804 def XOR : ALU_rr<0b0000000, 0b100, "xor", Commutable=1>, 810 def OR : ALU_rr<0b0000000, 0b110, "or", Commutable=1>, 812 def AND : ALU_rr<0b0000000, 0b111, "and", Commutable=1>, 895 def ADDW : ALUW_rr<0b0000000, 0b000, "addw", Commutable=1>,
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 1068 template <typename LHS_t, typename RHS_t, bool Commutable = false> 1080 (Commutable && L.match(I->getOperand(1)) && in match() 1116 bool Commutable = false> 1129 (Commutable && L.match(I->getOperand(1)) && in match() 1291 unsigned WrapFlags = 0, bool Commutable = false> 1310 (Commutable && L.match(Op->getOperand(1)) && in match() 1401 template <typename LHS_t, typename RHS_t, bool Commutable = false> 1403 : public BinaryOp_match<LHS_t, RHS_t, 0, Commutable> { 1407 : BinaryOp_match<LHS_t, RHS_t, 0, Commutable>(LHS, RHS), Opcode(Opcode) {} in SpecificBinaryOp_match() 1410 return BinaryOp_match<LHS_t, RHS_t, 0, Commutable>::match(Opcode, V); in match() [all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 175 Commutable, enumerator 483 bool isCommutable() const { return Flags & (1ULL << MCID::Commutable); } in isCommutable()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86Instr3DNow.td | 29 X86FoldableSchedWrite sched, bit Commutable = 0> { 31 let isCommutable = Commutable, mayLoad=0 in
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| H A D | X86InstrMMX.td | 35 X86FoldableSchedWrite sched, bit Commutable = 0, 42 let isCommutable = Commutable; 91 bit Commutable = 0> { 92 let isCommutable = Commutable in
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MIPatternMatch.h | 447 bool Commutable = false, unsigned Flags = MachineInstr::NoFlags> 465 (!Commutable || !L.match(MRI, TmpMI->getOperand(2).getReg()) || 476 template <typename LHS_P, typename RHS_P, bool Commutable = false> 497 (Commutable && (L.match(MRI, TmpMI->getOperand(2).getReg()) && 735 bool Commutable = false> 762 if (Commutable && L.match(MRI, RHS) && R.match(MRI, LHS) &&
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrNEON.td | 2635 ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable> 2642 let isCommutable = Commutable; 2648 SDNode OpNode, bit Commutable> 2655 let isCommutable = Commutable; 2686 ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable> 2693 let isCommutable = Commutable; 2697 ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable> 2704 let isCommutable = Commutable; 2737 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp, bit Commutable> 2744 let isCommutable = Commutable; [all …]
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| H A D | ARMInstrThumb2.td | 729 SDPatternOperator opnode, bit Commutable = 0, 747 let isCommutable = Commutable; 798 SDPatternOperator opnode, bit Commutable = 0> : 799 T2I_bin_irs<opcod, opc, iii, iir, iis, opnode, Commutable, ".w"> { 872 bit Commutable = 0> { 886 let isCommutable = Commutable; 922 bit Commutable = 0> { 1000 let isCommutable = Commutable; 1026 bit Commutable = 0, bit PostISelHook = 0> { 1043 let isCommutable = Commutable;
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| H A D | ARMInstrInfo.td | 1571 SDPatternOperator opnode, bit Commutable = 0> { 1596 let isCommutable = Commutable; 1717 bit Commutable = 0> { 1727 let isCommutable = Commutable; 1777 SDPatternOperator opnode, bit Commutable = 0, 1799 let isCommutable = Commutable; 1908 bit Commutable = 0> { 1933 let isCommutable = Commutable;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SDPatternMatch.h | 508 template <typename T0_P, typename T1_P, typename T2_P, bool Commutable = false, 527 (Commutable && Op0.match(Ctx, N->getOperand(EO.FirstIndex + 1)) && 582 template <typename LHS_P, typename RHS_P, bool Commutable = false, 600 (Commutable && LHS.match(Ctx, N->getOperand(EO.FirstIndex + 1)) && 648 bool Commutable = false, bool ExcludeChain = false> 670 (Commutable && LHS.match(Ctx, R) && RHS.match(Ctx, L));
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| H A D | MachineInstr.h | 1187 return hasProperty(MCID::Commutable, Type);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.td | 156 string opasm, bit Commutable> { 162 { let isCommutable = Commutable; } 254 multiclass ArcBinaryGEN4Inst<bits<6> mincode, string opasm, bit Commutable = 0> : 255 ArcBinaryInst<0b00100, mincode, opasm, Commutable>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrFormats.td | 538 bit Commutable = 0> : R_YXZ<0x31, sop, pcode, (outs GPR:$rz), 540 let isCommutable = Commutable;
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