| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4951 MVT CmpVT = N0.getSimpleValueType(); in tryVPTESTM() local
4952 MVT CmpSVT = CmpVT.getVectorElementType(); in tryVPTESTM()
4972 bool Widen = !Subtarget->hasVLX() && !CmpVT.is512BitVector(); in tryVPTESTM()
5030 unsigned Scale = CmpVT.is128BitVector() ? 4 : 2; in tryVPTESTM()
5031 unsigned SubReg = CmpVT.is128BitVector() ? X86::sub_xmm : X86::sub_ymm; in tryVPTESTM()
5032 unsigned NumElts = CmpVT.getVectorNumElements() * Scale; in tryVPTESTM()
5033 CmpVT = MVT::getVectorVT(CmpSVT, NumElts); in tryVPTESTM()
5036 CmpVT), 0); in tryVPTESTM()
5037 Src0 = CurDAG->getTargetInsertSubreg(SubReg, dl, CmpVT, ImplDef, Src0); in tryVPTESTM()
5040 Src1 = CurDAG->getTargetInsertSubreg(SubReg, dl, CmpVT, ImplDef, Src1); in tryVPTESTM()
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| H A D | X86FastISel.cpp | 2078 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitCMoveSelect() local
2080 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitCMoveSelect()
2314 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitPseudoSelect() local
2315 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitPseudoSelect()
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| H A D | X86ISelLowering.cpp | 22778 EVT VecVT, EVT CmpVT, bool HasPT, F SToV) { in emitOrXorXorTree() argument
22782 SDValue A = emitOrXorXorTree(Op0, DL, DAG, VecVT, CmpVT, HasPT, SToV); in emitOrXorXorTree()
22783 SDValue B = emitOrXorXorTree(Op1, DL, DAG, VecVT, CmpVT, HasPT, SToV); in emitOrXorXorTree()
22784 if (VecVT != CmpVT) in emitOrXorXorTree()
22785 return DAG.getNode(ISD::OR, DL, CmpVT, A, B); in emitOrXorXorTree()
22788 return DAG.getNode(ISD::AND, DL, CmpVT, A, B); in emitOrXorXorTree()
22793 if (VecVT != CmpVT) in emitOrXorXorTree()
22794 return DAG.getSetCC(DL, CmpVT, A, B, ISD::SETNE); in emitOrXorXorTree()
22797 return DAG.getSetCC(DL, CmpVT, A, B, ISD::SETEQ); in emitOrXorXorTree()
22855 EVT CmpVT = PreferKOT ? MVT::v16i1 : VecVT; in combineVectorSizedSetCCEquality() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6859 EVT CmpVT; in LowerVSETCC() local
6861 CmpVT = Op0.getValueType().changeVectorElementTypeToInteger(); in LowerVSETCC()
6874 CmpVT = VT; in LowerVSETCC()
6881 unsigned CmpElements = CmpVT.getVectorNumElements() * 2; in LowerVSETCC()
6889 Merged = DAG.getNode(ISD::BITCAST, dl, CmpVT, Merged); in LowerVSETCC()
6891 Merged = DAG.getNOT(dl, Merged, CmpVT); in LowerVSETCC()
6896 if (CmpVT.getVectorElementType() == MVT::i64) in LowerVSETCC()
6927 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6929 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6931 SDValue Result = DAG.getNode(ISD::OR, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 4583 EVT CmpVT = Src.getOperand(0).getValueType(); in performSETCC_BITCASTCombine() local
4584 EVT EltVT = CmpVT.getVectorElementType(); in performSETCC_BITCASTCombine()
4586 if (Subtarget.hasExtLSX() && CmpVT.getSizeInBits() == 128) in performSETCC_BITCASTCombine()
4589 CmpVT.getSizeInBits() == 256) in performSETCC_BITCASTCombine()
4669 EVT CmpVT = Src.getOperand(0).getValueType(); in performBITCASTCombine() local
4670 if (CmpVT.getSizeInBits() > 256) in performBITCASTCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 15875 EVT CmpVT = LHS.getValueType().changeVectorElementTypeToInteger(); in LowerVSETCC() local
15913 SDValue Cmp = emitVectorComparison(LHS, RHS, CC1, NoNaNs, CmpVT, DL, DAG); in LowerVSETCC()
15918 SDValue Cmp2 = emitVectorComparison(LHS, RHS, CC2, NoNaNs, CmpVT, DL, DAG); in LowerVSETCC()
15922 Cmp = DAG.getNode(ISD::OR, DL, CmpVT, Cmp, Cmp2); in LowerVSETCC()
20532 EVT CmpVT = InfoAndKind.IsAArch64 in performSetccAddFolding() local
20535 if (CmpVT != MVT::i32 && CmpVT != MVT::i64) in performSetccAddFolding()
20549 ISD::getSetCCInverse(InfoAndKind.Info.Generic.CC, CmpVT), CCVal, DAG, in performSetccAddFolding()
21744 EVT CmpVT = N->getOperand(2).getValueType(); in tryConvertSVEWideCompare() local
21789 SDValue Splat = DAG.getNode(ISD::SPLAT_VECTOR, DL, CmpVT, Imm); in tryConvertSVEWideCompare()
25324 EVT CmpVT = LHS.getValueType(); in performSETCCCombine() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8231 EVT CmpVT = Op.getOperand(0).getValueType(); in LowerSELECT_CC() local
8239 if (!Subtarget.hasP9Vector() && CmpVT == MVT::f128) { in LowerSELECT_CC()
8241 dl, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT), in LowerSELECT_CC()
8248 if (!CmpVT.isFloatingPoint() || !TV.getValueType().isFloatingPoint() || in LowerSELECT_CC()
8323 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC()
8333 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC()
8339 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC()
8345 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags); in LowerSELECT_CC()
8351 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags); in LowerSELECT_CC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 6371 EVT CmpVT = LHS.getValueType(); in lowerICMPIntrinsic() local
6372 if (CmpVT == MVT::i16 && !TLI.isTypeLegal(MVT::i16)) { in lowerICMPIntrinsic()
6401 EVT CmpVT = Src0.getValueType(); in lowerFCMPIntrinsic() local
6404 if (CmpVT == MVT::f16 && !TLI.isTypeLegal(CmpVT)) { in lowerFCMPIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 4318 EVT CmpVT = Tmp1.getValueType(); in ExpandNode() local
4322 EVT CCVT = getSetCCResultType(CmpVT); in ExpandNode()
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| H A D | SelectionDAGBuilder.cpp | 9139 EVT CmpVT = EVT::getIntegerVT(LHS->getContext(), LoadVT.getSizeInBits()); in visitMemCmpBCmpCall() local
9140 LoadL = DAG.getBitcast(CmpVT, LoadL); in visitMemCmpBCmpCall()
9141 LoadR = DAG.getBitcast(CmpVT, LoadR); in visitMemCmpBCmpCall()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 8689 EVT CmpVT = Src.getOperand(0).getValueType(); in combineSETCC() local
8690 if (CmpVT.getSizeInBits() == 128) { in combineSETCC()
8691 EVT IntVT = CmpVT.changeVectorElementTypeToInteger(); in combineSETCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 8052 EVT CmpVT = Tmp1.getValueType(); in LowerOperation() local
8054 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT); in LowerOperation()
16365 EVT CmpVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, VecSize); in combineVectorSizedSetCCEquality() local
16369 SDValue Mask = DAG.getAllOnesConstant(DL, CmpVT); in combineVectorSizedSetCCEquality()
16372 SDValue Cmp = DAG.getNode(ISD::VP_SETCC, DL, CmpVT, VecX, VecY, in combineVectorSizedSetCCEquality()
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