Lines Matching refs:CmpVT
22042 EVT VecVT, EVT CmpVT, bool HasPT, F SToV) { in emitOrXorXorTree() argument
22046 SDValue A = emitOrXorXorTree(Op0, DL, DAG, VecVT, CmpVT, HasPT, SToV); in emitOrXorXorTree()
22047 SDValue B = emitOrXorXorTree(Op1, DL, DAG, VecVT, CmpVT, HasPT, SToV); in emitOrXorXorTree()
22048 if (VecVT != CmpVT) in emitOrXorXorTree()
22049 return DAG.getNode(ISD::OR, DL, CmpVT, A, B); in emitOrXorXorTree()
22052 return DAG.getNode(ISD::AND, DL, CmpVT, A, B); in emitOrXorXorTree()
22057 if (VecVT != CmpVT) in emitOrXorXorTree()
22058 return DAG.getSetCC(DL, CmpVT, A, B, ISD::SETNE); in emitOrXorXorTree()
22061 return DAG.getSetCC(DL, CmpVT, A, B, ISD::SETEQ); in emitOrXorXorTree()
22119 EVT CmpVT = PreferKOT ? MVT::v16i1 : VecVT; in combineVectorSizedSetCCEquality() local
22122 CmpVT = PreferKOT ? MVT::v32i1 : VecVT; in combineVectorSizedSetCCEquality()
22129 CmpVT = MVT::v64i1; in combineVectorSizedSetCCEquality()
22134 CmpVT = MVT::v16i1; in combineVectorSizedSetCCEquality()
22174 Cmp = emitOrXorXorTree(X, DL, DAG, VecVT, CmpVT, HasPT, ScalarToVector); in combineVectorSizedSetCCEquality()
22178 if (VecVT != CmpVT) { in combineVectorSizedSetCCEquality()
22179 Cmp = DAG.getSetCC(DL, CmpVT, VecX, VecY, ISD::SETNE); in combineVectorSizedSetCCEquality()
22183 Cmp = DAG.getSetCC(DL, CmpVT, VecX, VecY, ISD::SETEQ); in combineVectorSizedSetCCEquality()
22187 if (VecVT != CmpVT) { in combineVectorSizedSetCCEquality()
22188 EVT KRegVT = CmpVT == MVT::v64i1 ? MVT::i64 in combineVectorSizedSetCCEquality()
22189 : CmpVT == MVT::v32i1 ? MVT::i32 in combineVectorSizedSetCCEquality()
22712 EVT CmpVT = Op0.getValueType(); in EmitCmp() local
22714 assert((CmpVT == MVT::i8 || CmpVT == MVT::i16 || in EmitCmp()
22715 CmpVT == MVT::i32 || CmpVT == MVT::i64) && "Unexpected VT!"); in EmitCmp()
22721 if (CmpVT == MVT::i16 && !Subtarget.hasFastImm16() && in EmitCmp()
22743 CmpVT = MVT::i32; in EmitCmp()
22744 Op0 = DAG.getNode(ExtendOp, dl, CmpVT, Op0); in EmitCmp()
22745 Op1 = DAG.getNode(ExtendOp, dl, CmpVT, Op1); in EmitCmp()
22751 if (CmpVT == MVT::i64 && !isX86CCSigned(X86CC) && in EmitCmp()
22755 CmpVT = MVT::i32; in EmitCmp()
22756 Op0 = DAG.getNode(ISD::TRUNCATE, dl, CmpVT, Op0); in EmitCmp()
22757 Op1 = DAG.getNode(ISD::TRUNCATE, dl, CmpVT, Op1); in EmitCmp()
22764 SDVTList VTs = DAG.getVTList(CmpVT, MVT::i32); in EmitCmp()
22773 SDVTList VTs = DAG.getVTList(CmpVT, MVT::i32); in EmitCmp()
22779 SDVTList VTs = DAG.getVTList(CmpVT, MVT::i32); in EmitCmp()
43501 EVT CmpVT = Src.getOperand(0).getValueType(); in combineBitcastvxi1() local
43502 EVT EltVT = CmpVT.getVectorElementType(); in combineBitcastvxi1()
43503 if (CmpVT.getSizeInBits() <= 256 && in combineBitcastvxi1()
44081 MVT CmpVT = MVT::getVectorVT(MVT::i1, MovMskElts); in combineBitcast() local
44082 SDValue Cmp = DAG.getSetCC(dl, CmpVT, MovmskIn, in combineBitcast()
44084 if (EVT(CmpVT) == VT) in combineBitcast()
44090 SmallVector<SDValue, 4> Ops(NumConcats, DAG.getConstant(0, dl, CmpVT)); in combineBitcast()
44464 MVT CmpVT = NumElts == 64 ? MVT::i64 : MVT::i32; in combinePredicateReduction() local
44467 SDValue Result = DAG.getNode(ISD::PARITY, DL, CmpVT, Movmsk); in combinePredicateReduction()
44475 CmpC = DAG.getConstant(0, DL, CmpVT); in combinePredicateReduction()
44479 CmpC = DAG.getConstant(APInt::getLowBitsSet(CmpVT.getSizeInBits(), NumElts), in combinePredicateReduction()
44480 DL, CmpVT); in combinePredicateReduction()
44486 EVT SetccVT = TLI.getSetCCResultType(DAG.getDataLayout(), Ctx, CmpVT); in combinePredicateReduction()
46439 EVT CmpVT = CmpLHS.getValueType(); in combineSetCCAtomicArith() local
46496 ISD::ATOMIC_LOAD_SUB, SDLoc(CmpLHS), CmpVT, in combineSetCCAtomicArith()
46498 /*RHS*/ DAG.getConstant(NegAddend, SDLoc(CmpRHS), CmpVT), in combineSetCCAtomicArith()
46501 DAG.ReplaceAllUsesOfValueWith(CmpLHS.getValue(0), DAG.getUNDEF(CmpVT)); in combineSetCCAtomicArith()
46523 DAG.ReplaceAllUsesOfValueWith(CmpLHS.getValue(0), DAG.getUNDEF(CmpVT)); in combineSetCCAtomicArith()