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Searched refs:Cases (Results 1 – 25 of 103) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A DStringSwitch.h40 /// .Cases("violet", "purple", Violet)
90 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, T Value) { in Cases() function
94 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() function
96 return Case(S0, Value).Cases(S1, S2, Value); in Cases()
99 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() function
101 return Case(S0, Value).Cases(S1, S2, S3, Value); in Cases()
104 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() function
106 return Case(S0, Value).Cases(S1, S2, S3, S4, Value); in Cases()
109 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() function
112 return Case(S0, Value).Cases(S in Cases()
115 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, Cases() function
121 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, Cases() function
127 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, Cases() function
134 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, Cases() function
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/freebsd/contrib/llvm-project/clang/lib/Frontend/
H A DFrontendOptions.cpp17 .Cases("ast", "pcm", InputKind(Language::Unknown, InputKind::Precompiled)) in getInputKindForExtension()
19 .Cases("S", "s", Language::Asm) in getInputKindForExtension()
25 .Cases("mm", "M", Language::ObjCXX) in getInputKindForExtension()
27 .Cases("C", "cc", "cp", Language::CXX) in getInputKindForExtension()
28 .Cases("cpp", "CPP", "c++", "cxx", "hpp", "hxx", Language::CXX) in getInputKindForExtension()
30 .Cases("iim", "iih", InputKind(Language::CXX).getPreprocessed()) in getInputKindForExtension()
33 .Cases("cu", "cuh", Language::CUDA) in getInputKindForExtension()
35 .Cases("ll", "bc", Language::LLVM_IR) in getInputKindForExtension()
/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DAVR.cpp354 .Cases("31", "51", "6", true) in ArchHasELPM()
355 .Cases("102", "104", "105", "106", "107", true) in ArchHasELPM()
361 .Cases("51", "6", true) in ArchHasELPMX()
362 .Cases("102", "104", "105", "106", "107", true) in ArchHasELPMX()
368 .Cases("25", "35", "4", "5", "51", "6", true) in ArchHasMOVW()
369 .Cases("102", "103", "104", "105", "106", "107", true) in ArchHasMOVW()
379 .Cases("4", "5", "51", "6", true) in ArchHasMUL()
380 .Cases("102", "103", "104", "105", "106", "107", true) in ArchHasMUL()
386 .Cases("3", "31", "35", "5", "51", "6", true) in ArchHasJMPCALL()
387 .Cases("102", "103", "104", "105", "106", "107", true) in ArchHasJMPCALL()
H A DPPC.h136 .Cases("power3", "pwr3", ArchDefinePpcgr) in setCPU()
137 .Cases("power4", "pwr4", in setCPU()
139 .Cases("power5", "pwr5", in setCPU()
142 .Cases("power5x", "pwr5x", in setCPU()
145 .Cases("power6", "pwr6", in setCPU()
148 .Cases("power6x", "pwr6x", in setCPU()
152 .Cases("power7", "pwr7", in setCPU()
157 .Cases("power8", "pwr8", "ppc64le", in setCPU()
161 .Cases("power9", "pwr9", in setCPU()
165 .Cases("power10", "pwr10", in setCPU()
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H A DMips.cpp63 .Cases("mips32", "mips64", 1) in getISARev()
64 .Cases("mips32r2", "mips64r2", "octeon", "octeon+", 2) in getISARev()
65 .Cases("mips32r3", "mips64r3", 3) in getISARev()
66 .Cases("mips32r5", "mips64r5", 5) in getISARev()
67 .Cases("mips32r6", "mips64r6", 6) in getISARev()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLowerSwitch.cpp309 unsigned Clusterify(CaseVector &Cases, SwitchInst *SI) { in Clusterify() argument
316 Cases.push_back(CaseRange(Case.getCaseValue(), Case.getCaseValue(), in Clusterify()
321 llvm::sort(Cases, CaseCmp()); in Clusterify()
324 if (Cases.size() >= 2) { in Clusterify()
325 CaseItr I = Cases.begin(); in Clusterify()
326 for (CaseItr J = std::next(I), E = Cases.end(); J != E; ++J) { in Clusterify()
343 Cases.erase(std::next(I), Cases.end()); in Clusterify()
368 CaseVector Cases; in ProcessSwitchInst() local
369 const unsigned NumSimpleCases = Clusterify(Cases, SI); in ProcessSwitchInst()
376 LLVM_DEBUG(dbgs() << "Clusterify finished. Total clusters: " << Cases.size() in ProcessSwitchInst()
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/freebsd/contrib/llvm-project/clang/lib/ARCMigrate/
H A DTransProtectedScope.cpp57 SmallVectorImpl<CaseInfo> &Cases; member in __anon2f6a04b40111::CaseCollector
60 CaseCollector(ParentMap &PMap, SmallVectorImpl<CaseInfo> &Cases) in CaseCollector() argument
61 : PMap(PMap), Cases(Cases) { } in CaseCollector()
80 Cases.push_back( in VisitSwitchStmt()
99 SmallVector<CaseInfo, 16> Cases; member in __anon2f6a04b40111::ProtectedScopeFixer
107 CaseCollector(BodyCtx.getParentMap(), Cases) in ProtectedScopeFixer()
150 for (unsigned i = 0; i != Cases.size(); i++) { in handleProtectedNote()
151 CaseInfo &info = Cases[i]; in handleProtectedNote()
/freebsd/contrib/llvm-project/clang/lib/Tooling/Transformer/
H A DRewriteRule.cpp197 R.Cases = {{std::move(M), std::move(Edits)}}; in makeRule()
283 auto Transformations = Rule.Cases[I].Edits(Result); in run()
361 for (auto &Case : Rule.Cases) in addInclude()
380 const SmallVectorImpl<std::pair<size_t, RewriteRule::Case>> &Cases, in taggedMatchers() argument
383 Matchers.reserve(Cases.size()); in taggedMatchers()
384 for (const auto &Case : Cases) { in taggedMatchers()
405 R.Cases.append(Rule.Cases.begin(), Rule.Cases.end()); in applyFirst()
418 const SmallVectorImpl<RewriteRule::Case> &Cases = Rule.Cases; in buildMatchers() local
419 for (int I = 0, N = Cases.size(); I < N; ++I) { in buildMatchers()
420 assert(hasValidKind(Cases[I].Matcher) && in buildMatchers()
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/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/
H A DM68k.cpp43 .Cases("m68000", "68000", "M68000") in getM68kTargetCPU()
44 .Cases("m68010", "68010", "M68010") in getM68kTargetCPU()
45 .Cases("m68020", "68020", "M68020") in getM68kTargetCPU()
46 .Cases("m68030", "68030", "M68030") in getM68kTargetCPU()
47 .Cases("m68040", "68040", "M68040") in getM68kTargetCPU()
48 .Cases("m68060", "68060", "M68060") in getM68kTargetCPU()
H A DMips.cpp119 .Cases("n32", "n64", DefMips64CPU) in getMipsCPUAndABI()
464 .Cases("mips32r6", "mips64r6", true) in isNaN2008()
489 .Cases("mips2", "mips3", "mips4", "mips5", true) in isFPXXDefault()
490 .Cases("mips32", "mips32r2", "mips32r3", "mips32r5", true) in isFPXXDefault()
491 .Cases("mips64", "mips64r2", "mips64r3", "mips64r5", true) in isFPXXDefault()
509 .Cases("mips32r2", "mips32r3", "mips32r5", false) in shouldUseFPXX()
510 .Cases("mips64r2", "mips64r3", "mips64r5", false) in shouldUseFPXX()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DDAGISelMatcherOpt.cpp423 SmallVector<std::pair<const SDNodeInfo *, Matcher *>, 8> Cases; in FactorNodes() local
428 Cases.push_back(std::pair(&COM->getOpcode(), COM->takeNext())); in FactorNodes()
432 MatcherPtr.reset(new SwitchOpcodeMatcher(std::move(Cases))); in FactorNodes()
439 SmallVector<std::pair<MVT::SimpleValueType, Matcher *>, 8> Cases; in FactorNodes() local
452 Matcher *PrevMatcher = Cases[Entry - 1].second; in FactorNodes()
460 Cases[Entry - 1].second = new ScopeMatcher(std::move(Entries)); in FactorNodes()
464 Entry = Cases.size() + 1; in FactorNodes()
465 Cases.push_back(std::pair(CTMTy, MatcherWithoutCTM)); in FactorNodes()
469 for (auto &M : Cases) { in FactorNodes()
478 if (Cases.size() != 1) { in FactorNodes()
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/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DARMTargetParserCommon.cpp25 .Cases("v6m", "v6sm", "v6s-m", "v6-m") in getArchSynonym()
26 .Cases("v6z", "v6zk", "v6kz") in getArchSynonym()
27 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a") in getArchSynonym()
31 .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a") in getArchSynonym()
42 .Cases("v9", "v9a", "v9-a") in getArchSynonym()
H A DTriple.cpp535 .Cases("i386", "i486", "i586", "i686", Triple::x86) in parseArch()
537 .Cases("i786", "i886", "i986", Triple::x86) in parseArch()
538 .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64) in parseArch()
539 .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc) in parseArch()
540 .Cases("powerpcle", "ppcle", "ppc32le", Triple::ppcle) in parseArch()
541 .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64) in parseArch()
542 .Cases("powerpc64le", "ppc64le", Triple::ppc64le) in parseArch()
560 .Cases("mips", "mipseb", "mipsallegrex", "mipsisa32r6", "mipsr6", in parseArch()
562 .Cases("mipsel", "mipsallegrexel", "mipsisa32r6el", "mipsr6el", in parseArch()
564 .Cases("mips64", "mips64eb", "mipsn32", "mipsisa64r6", "mips64r6", in parseArch()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp886 .Cases("{t7}", "{fp}", CSKY::R23) in getRegForInlineAsmConstraint()
887 .Cases("{t8}", "{top}", CSKY::R24) in getRegForInlineAsmConstraint()
888 .Cases("{t9}", "{bsp}", CSKY::R25) in getRegForInlineAsmConstraint()
891 .Cases("{gb}", "{rgb}", "{rdb}", CSKY::R28) in getRegForInlineAsmConstraint()
892 .Cases("{tb}", "{rtb}", CSKY::R29) in getRegForInlineAsmConstraint()
909 .Cases("{fr0}", "{vr0}", CSKY::F0_32) in getRegForInlineAsmConstraint()
910 .Cases("{fr1}", "{vr1}", CSKY::F1_32) in getRegForInlineAsmConstraint()
911 .Cases("{fr2}", "{vr2}", CSKY::F2_32) in getRegForInlineAsmConstraint()
912 .Cases("{fr3}", "{vr3}", CSKY::F3_32) in getRegForInlineAsmConstraint()
913 .Cases("{fr4}", "{vr4}", CSKY::F4_32) in getRegForInlineAsmConstraint()
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/freebsd/contrib/llvm-project/clang/include/clang/Tooling/Transformer/
H A DRewriteRule.h288 SmallVector<Case, 1> Cases; member
313 R.Cases = {{std::move(M), std::move(Edits)}};
417 assert(Rule.Cases.size() == Rule.Metadata.size() &&
419 R.Cases.append(Rule.Cases.begin(), Rule.Cases.end());
447 R.Cases = std::move(Rule.Cases);
/freebsd/contrib/llvm-project/lldb/source/Plugins/ABI/RISCV/
H A DABISysV_riscv.cpp713 .Cases("ra", "sp", "fp", true) in RegisterIsCalleeSaved()
714 .Cases("s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", in RegisterIsCalleeSaved()
716 .Cases("s10", "s11", true) in RegisterIsCalleeSaved()
718 .Cases("x1", "x2", "x8", "x9", "x18", "x19", "x20", "x21", "x22", in RegisterIsCalleeSaved()
720 .Cases("x23", "x24", "x25", "x26", "x27", true) in RegisterIsCalleeSaved()
722 .Cases("fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", in RegisterIsCalleeSaved()
724 .Cases("fs8", "fs9", "fs10", "fs11", is_hw_fp) in RegisterIsCalleeSaved()
726 .Cases("f8", "f9", "f18", "f19", "f20", "f21", "f22", "f23", is_hw_fp) in RegisterIsCalleeSaved()
727 .Cases("f24", "f25", "f26", "f27", is_hw_fp) in RegisterIsCalleeSaved()
745 .Cases("ra", "x1", LLDB_REGNUM_GENERIC_RA) in GetGenericNum()
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/freebsd/contrib/llvm-project/llvm/lib/Object/
H A DWindowsMachineFlag.cpp25 .Cases("x64", "amd64", COFF::IMAGE_FILE_MACHINE_AMD64) in getMachineType()
26 .Cases("x86", "i386", COFF::IMAGE_FILE_MACHINE_I386) in getMachineType()
/freebsd/contrib/llvm-project/clang/lib/Lex/
H A DPPDirectives.cpp234 .Cases("assert.h", "complex.h", "ctype.h", "errno.h", "fenv.h", true) in warnByDefaultOnWrongCase()
235 .Cases("float.h", "inttypes.h", "iso646.h", "limits.h", "locale.h", true) in warnByDefaultOnWrongCase()
236 .Cases("math.h", "setjmp.h", "signal.h", "stdalign.h", "stdarg.h", true) in warnByDefaultOnWrongCase()
237 .Cases("stdatomic.h", "stdbool.h", "stdckdint.h", "stddef.h", true) in warnByDefaultOnWrongCase()
238 .Cases("stdint.h", "stdio.h", "stdlib.h", "stdnoreturn.h", true) in warnByDefaultOnWrongCase()
239 .Cases("string.h", "tgmath.h", "threads.h", "time.h", "uchar.h", true) in warnByDefaultOnWrongCase()
240 .Cases("wchar.h", "wctype.h", true) in warnByDefaultOnWrongCase()
243 .Cases("cassert", "ccomplex", "cctype", "cerrno", "cfenv", true) in warnByDefaultOnWrongCase()
244 .Cases("cfloat", "cinttypes", "ciso646", "climits", "clocale", true) in warnByDefaultOnWrongCase()
245 .Cases("cmath", "csetjmp", "csignal", "cstdalign", "cstdarg", true) in warnByDefaultOnWrongCase()
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/freebsd/contrib/llvm-project/llvm/tools/llvm-cov/
H A Dllvm-cov.cpp74 .Cases("-h", "-help", "--help", helpMain) in main()
75 .Cases("-version", "--version", versionMain) in main()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DDAGISelMatcher.h496 SmallVector<std::pair<const SDNodeInfo *, Matcher *>, 8> Cases; variable
501 : Matcher(SwitchOpcode), Cases(std::move(cases)) {} in SwitchOpcodeMatcher()
506 unsigned getNumCases() const { return Cases.size(); } in getNumCases()
508 const SDNodeInfo &getCaseOpcode(unsigned i) const { return *Cases[i].first; } in getCaseOpcode()
509 Matcher *getCaseMatcher(unsigned i) { return Cases[i].second; } in getCaseMatcher()
510 const Matcher *getCaseMatcher(unsigned i) const { return Cases[i].second; } in getCaseMatcher()
545 SmallVector<std::pair<MVT::SimpleValueType, Matcher *>, 8> Cases; variable
550 : Matcher(SwitchType), Cases(std::move(cases)) {} in SwitchTypeMatcher()
555 unsigned getNumCases() const { return Cases.size(); } in getNumCases()
557 MVT::SimpleValueType getCaseType(unsigned i) const { return Cases[i].first; } in getCaseType()
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H A DDAGISelMatcher.cpp85 for (auto &C : Cases) in ~SwitchOpcodeMatcher()
90 for (auto &C : Cases) in ~SwitchTypeMatcher()
176 for (const auto &C : Cases) { in printImpl()
190 for (const auto &C : Cases) { in printImpl()
/freebsd/contrib/llvm-project/lldb/source/Plugins/ABI/AArch64/
H A DABIAArch64.cpp93 .Cases("lr", "x30", LLDB_REGNUM_GENERIC_RA) in GetGenericNum()
94 .Cases("sp", "x31", LLDB_REGNUM_GENERIC_SP) in GetGenericNum()
95 .Cases("fp", "x29", LLDB_REGNUM_GENERIC_FP) in GetGenericNum()
/freebsd/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
H A DAnalysisManager.h142 .Cases("c", "m", "mm", "C", "cc", "cp", true) in isInCodeFile()
143 .Cases("cpp", "CPP", "c++", "cxx", "cppm", true) in isInCodeFile()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp2447 .Cases("TYPE","type",IOK_TYPE) in IdentifyIntelInlineAsmOperator()
2448 .Cases("SIZE","size",IOK_SIZE) in IdentifyIntelInlineAsmOperator()
2449 .Cases("LENGTH","length",IOK_LENGTH) in IdentifyIntelInlineAsmOperator()
2493 .Cases("size", "sizeof", MOK_SIZEOF) in IdentifyMasmOperator()
2494 .Cases("length", "lengthof", MOK_LENGTHOF) in IdentifyMasmOperator()
2557 .Cases("BYTE", "byte", 8) in ParseIntelMemoryOperandSize()
2558 .Cases("WORD", "word", 16) in ParseIntelMemoryOperandSize()
2559 .Cases("DWORD", "dword", 32) in ParseIntelMemoryOperandSize()
2560 .Cases("FLOAT", "float", 32) in ParseIntelMemoryOperandSize()
2561 .Cases("LONG", "long", 32) in ParseIntelMemoryOperandSize()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DIRTranslator.cpp546 const std::vector<SwitchCG::CaseBlock> &Cases) { in shouldEmitAsBranches() argument
548 if (Cases.size() != 2) in shouldEmitAsBranches()
553 if ((Cases[0].CmpLHS == Cases[1].CmpLHS && in shouldEmitAsBranches()
554 Cases[0].CmpRHS == Cases[1].CmpRHS) || in shouldEmitAsBranches()
555 (Cases[0].CmpRHS == Cases[1].CmpLHS && in shouldEmitAsBranches()
556 Cases[0].CmpLHS == Cases[1].CmpRHS)) { in shouldEmitAsBranches()
562 if (Cases[0].CmpRHS == Cases[1].CmpRHS && in shouldEmitAsBranches()
563 Cases[0].PredInfo.Pred == Cases[1].PredInfo.Pred && in shouldEmitAsBranches()
564 isa<Constant>(Cases[0].CmpRHS) && in shouldEmitAsBranches()
565 cast<Constant>(Cases[0].CmpRHS)->isNullValue()) { in shouldEmitAsBranches()
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