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Searched refs:CalleeSavedRegs (Results 1 – 25 of 30) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVCallingConv.td16 def CSR_ILP32E_LP64E : CalleeSavedRegs<(add X1, X8, X9)>;
19 : CalleeSavedRegs<(add CSR_ILP32E_LP64E, (sequence "X%u", 18, 27))>;
22 : CalleeSavedRegs<(add CSR_ILP32_LP64,
26 : CalleeSavedRegs<(add CSR_ILP32_LP64,
34 : CalleeSavedRegs<(add CSR_ILP32_LP64, CSR_V)>;
37 : CalleeSavedRegs<(add CSR_ILP32F_LP64F, CSR_V)>;
40 : CalleeSavedRegs<(add CSR_ILP32D_LP64D, CSR_V)>;
43 def CSR_NoRegs : CalleeSavedRegs<(add)>;
47 def CSR_Interrupt : CalleeSavedRegs<(add X1, (sequence "X%u", 5, 31))>;
50 def CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add CSR_Interrupt,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.td298 def CSR_Altivec : CalleeSavedRegs<(add V20, V21, V22, V23, V24, V25, V26, V27,
302 def CSR_SVR432_COMM : CalleeSavedRegs<(add R14, R15, R16, R17, R18, R19, R20,
306 def CSR_SVR432 : CalleeSavedRegs<(add CSR_SVR432_COMM, F14, F15, F16, F17, F18,
310 def CSR_SPE : CalleeSavedRegs<(add S14, S15, S16, S17, S18, S19, S20, S21, S22,
314 def CSR_SPE_NO_S30_31 : CalleeSavedRegs<(add S14, S15, S16, S17, S18, S19, S20, S21,
318 def CSR_SVR432_Altivec : CalleeSavedRegs<(add CSR_SVR432, CSR_Altivec)>;
320 def CSR_SVR432_SPE : CalleeSavedRegs<(add CSR_SVR432_COMM, CSR_SPE)>;
322 def CSR_SVR432_SPE_NO_S30_31 : CalleeSavedRegs<(add CSR_SVR432_COMM, CSR_SPE_NO_S30_31)>;
324 def CSR_AIX32 : CalleeSavedRegs<(add R13, R14, R15, R16, R17, R18, R19, R20,
331 def CSR_AIX32_Altivec : CalleeSavedRegs<(add CSR_AIX32, CSR_Altivec)>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYCallingConv.td13 def CSR_I32 : CalleeSavedRegs<(add R8, R15, (sequence "R%u", 4, 7),
15 def CSR_GPR_FPR32 : CalleeSavedRegs<(add CSR_I32, (sequence "F%u_32", 8, 15))>;
16 def CSR_GPR_FPR64 : CalleeSavedRegs<(add CSR_I32,
21 def CSR_GPR_ISR : CalleeSavedRegs<(add R8, R15,
27 def CSR_GPR_FPR32_ISR: CalleeSavedRegs<(add CSR_GPR_ISR,
29 def CSR_GPR_FPR64_ISR: CalleeSavedRegs<(add CSR_GPR_ISR,
32 def CSR_GPR_FPR32v3_ISR: CalleeSavedRegs<(add CSR_GPR_FPR32_ISR,
34 def CSR_GPR_FPR64v3_ISR: CalleeSavedRegs<(add CSR_GPR_FPR64_ISR,
38 def CSR_NoRegs : CalleeSavedRegs<(add)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchCallingConv.td14 : CalleeSavedRegs<(add R1, (sequence "R%u", 22, 31))>;
17 : CalleeSavedRegs<(add CSR_ILP32S_LP64S, (sequence "F%u", 24, 31))>;
20 : CalleeSavedRegs<(add CSR_ILP32S_LP64S, (sequence "F%u_64", 24, 31))>;
23 def CSR_NoRegs : CalleeSavedRegs<(add)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallingConv.td267 def CSR_NoRegs : CalleeSavedRegs<(add)>;
268 def CSR_FPRegs : CalleeSavedRegs<(add (sequence "D%u", 0, 31))>;
270 def CSR_AAPCS : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, R5, R4,
275 def CSR_Win_AAPCS_CFGuard_Check : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7,
279 def CSR_AAPCS_SwiftError : CalleeSavedRegs<(sub CSR_AAPCS, R8)>;
282 def CSR_AAPCS_SwiftTail : CalleeSavedRegs<(sub CSR_AAPCS, R10)>;
288 def CSR_ATPCS_SplitPush : CalleeSavedRegs<(add LR, R7, R6, R5, R4,
292 def CSR_Win_SplitFP : CalleeSavedRegs<(add R10, R9, R8, R7, R6, R5, R4,
297 def CSR_ATPCS_SplitPush_SwiftError : CalleeSavedRegs<(sub CSR_ATPCS_SplitPush,
301 def CSR_ATPCS_SplitPush_SwiftTail : CalleeSavedRegs<(sub CSR_ATPCS_SplitPush,
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.td558 def CSR_AArch64_AAPCS : CalleeSavedRegs<(add X19, X20, X21, X22, X23, X24,
565 def CSR_AArch64_AAPCS_X18 : CalleeSavedRegs<(add X18, CSR_AArch64_AAPCS)>;
570 def CSR_Win_AArch64_AAPCS : CalleeSavedRegs<(add X19, X20, X21, X22, X23, X24,
576 : CalleeSavedRegs<(sub CSR_Win_AArch64_AAPCS, X21)>;
579 : CalleeSavedRegs<(sub CSR_Win_AArch64_AAPCS, X20, X22)>;
583 def CSR_Win_AArch64_CFGuard_Check : CalleeSavedRegs<(add CSR_Win_AArch64_AAPCS,
588 def CSR_Win_AArch64_Arm64EC_Thunk : CalleeSavedRegs<(add (sequence "Q%u", 6, 15),
594 def CSR_AArch64_AAVPCS : CalleeSavedRegs<(add X19, X20, X21, X22, X23, X24,
600 def CSR_AArch64_SVE_AAPCS : CalleeSavedRegs<(add (sequence "Z%u", 8, 23),
607 : CalleeSavedRegs<(add (sequence "Z%u", 0, 31),
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRCallingConv.td40 def CSR_Normal : CalleeSavedRegs<(add R29, R28, (sequence "R%u", 17, 2))>;
41 def CSR_NormalTiny : CalleeSavedRegs<(add R29, R28, R19, R18)>;
42 def CSR_Interrupts : CalleeSavedRegs<(add(sequence "R%u", 31, 2))>;
43 def CSR_InterruptsTiny : CalleeSavedRegs<(add(sequence "R%u", 31, 18))>;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallingConv.td135 def CSR_AMDGPU_VGPRs : CalleeSavedRegs<
153 def CSR_AMDGPU_AGPRs : CalleeSavedRegs<
157 def CSR_AMDGPU_SGPRs : CalleeSavedRegs<
161 def CSR_AMDGPU_SI_Gfx_SGPRs : CalleeSavedRegs<
165 def CSR_AMDGPU : CalleeSavedRegs<
169 def CSR_AMDGPU_GFX90AInsts : CalleeSavedRegs<
173 def CSR_AMDGPU_SI_Gfx : CalleeSavedRegs<
177 def CSR_AMDGPU_SI_Gfx_GFX90AInsts : CalleeSavedRegs<
181 def CSR_AMDGPU_CS_ChainPreserve : CalleeSavedRegs<
185 def CSR_AMDGPU_NoRegs : CalleeSavedRegs<(add)>;
[all …]
H A DSIMachineFunctionInfo.cpp302 SmallVectorImpl<std::pair<Register, int>> &CalleeSavedRegs, in splitWWMSpillRegisters() argument
307 CalleeSavedRegs.push_back(Reg); in splitWWMSpillRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallingConv.td1139 def CSR_NoRegs : CalleeSavedRegs<(add)>;
1141 def CSR_32 : CalleeSavedRegs<(add ESI, EDI, EBX, EBP)>;
1142 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>;
1144 def CSR_64_SwiftError : CalleeSavedRegs<(sub CSR_64, R12)>;
1145 def CSR_64_SwiftTail : CalleeSavedRegs<(sub CSR_64, R13, R14)>;
1147 def CSR_32EHRet : CalleeSavedRegs<(add EAX, EDX, CSR_32)>;
1148 def CSR_64EHRet : CalleeSavedRegs<(add RAX, RDX, CSR_64)>;
1150 def CSR_Win64_NoSSE : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15)>;
1152 def CSR_Win64 : CalleeSavedRegs<(add CSR_Win64_NoSSE,
1155 def CSR_Win64_SwiftError : CalleeSavedRegs<(sub CSR_Win64, R12)>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallingConv.td362 def CSR_SingleFloatOnly : CalleeSavedRegs<(add (sequence "F%u", 31, 20), RA, FP,
365 def CSR_O32_FPXX : CalleeSavedRegs<(add (sequence "D%u", 15, 10), RA, FP,
370 def CSR_O32 : CalleeSavedRegs<(add (sequence "D%u", 15, 10), RA, FP,
374 CalleeSavedRegs<(add (decimate (sequence "D%u_64", 30, 20), 2), RA, FP,
377 def CSR_N32 : CalleeSavedRegs<(add D20_64, D22_64, D24_64, D26_64, D28_64,
381 def CSR_N64 : CalleeSavedRegs<(add (sequence "D%u_64", 31, 24), RA_64, FP_64,
385 CalleeSavedRegs<(add V0, V1, FP,
389 def CSR_Interrupt_32R6 : CalleeSavedRegs<(add (sequence "A%u", 3, 0),
395 def CSR_Interrupt_32 : CalleeSavedRegs<(add (sequence "A%u", 3, 0),
401 def CSR_Interrupt_64R6 : CalleeSavedRegs<(add (sequence "A%u_64", 3, 0),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXRegisterInfo.cpp97 static const MCPhysReg CalleeSavedRegs[] = { 0 }; in getCalleeSavedRegs() local
98 return CalleeSavedRegs; in getCalleeSavedRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.td147 def CSR_SystemZ_ELF : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
151 def CSR_SystemZ_SwiftError : CalleeSavedRegs<(sub CSR_SystemZ_ELF, R9D)>;
156 def CSR_SystemZ_AllRegs : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
158 def CSR_SystemZ_AllRegs_Vector : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
161 def CSR_SystemZ_NoRegs : CalleeSavedRegs<(add)>;
166 def CSR_SystemZ_XPLINK64 : CalleeSavedRegs<(add (sequence "R%dD", 8, 15),
169 def CSR_SystemZ_XPLINK64_Vector : CalleeSavedRegs<(add CSR_SystemZ_XPLINK64,
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVECallingConv.td147 def CSR : CalleeSavedRegs<(add (sequence "SX%u", 18, 33))>;
148 def CSR_NoRegs : CalleeSavedRegs<(add)>;
151 def CSR_preserve_all : CalleeSavedRegs<(add (sequence "SX%u", 0, 61),
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegisterInfo.cpp40 static const MCPhysReg CalleeSavedRegs[] = {0}; in getCalleeSavedRegs() local
41 return CalleeSavedRegs; in getCalleeSavedRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp41 static const MCPhysReg CalleeSavedRegs[] = { in getCalleeSavedRegs() local
69 CalleeSavedRegsIntr : CalleeSavedRegs); in getCalleeSavedRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kCallingConv.td108 def CSR_NoRegs : CalleeSavedRegs<(add)>;
112 def CSR_STD : CalleeSavedRegs<(add D2, D3, D4, D5, D6, D7,
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaCallingConv.td24 def CSR_Xtensa : CalleeSavedRegs<(add A0, A12, A13, A14, A15)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCCallingConv.td40 def CSR_ARC : CalleeSavedRegs<(add (sequence "R%u", 13, 25), GP, FP)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiCallingConv.td49 def CSR: CalleeSavedRegs<(add)>;
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetCallingConv.td215 /// CalleeSavedRegs - A list of callee saved registers for a given calling
219 /// For each CalleeSavedRegs def, TableGen will emit a FOO_SaveList array for
222 class CalleeSavedRegs<dag saves> {
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFCallingConv.td48 def CSR : CalleeSavedRegs<(add R6, R7, R8, R9, R10)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp216 static const MCPhysReg CalleeSavedRegs[] = { in getCalleeSavedRegs() local
229 return CalleeSavedRegs; in getCalleeSavedRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcCallingConv.td139 def CSR : CalleeSavedRegs<(add)> {
145 def RTCSR : CalleeSavedRegs<(add)> {
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.cpp269 const BitVector &CalleeSavedRegs; member in TransferTracker
274 const BitVector &CalleeSavedRegs, const TargetPassConfig &TPC) in TransferTracker() argument
276 CalleeSavedRegs(CalleeSavedRegs) { in TransferTracker()
287 if (CalleeSavedRegs.test(*RAI)) in isCalleeSaved()
1349 if (CalleeSavedRegs.test(*RAI)) in isCalleeSavedReg()
3536 new TransferTracker(TII, MTracker, MF, DVMap, *TRI, CalleeSavedRegs, TPC); in depthFirstVLocAndEmit()
3694 TFI->getCalleeSaves(MF, CalleeSavedRegs); in ExtendRanges()

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