/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86TargetTransformInfo.cpp | 3493 { ISD::CTPOP, MVT::v32i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3494 { ISD::CTPOP, MVT::v64i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3495 { ISD::CTPOP, MVT::v16i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3496 { ISD::CTPOP, MVT::v32i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3497 { ISD::CTPOP, MVT::v8i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3498 { ISD::CTPOP, MVT::v16i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3501 { ISD::CTPOP, MVT::v8i64, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3502 { ISD::CTPOP, MVT::v16i32, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3503 { ISD::CTPOP, MVT::v4i64, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3504 { ISD::CTPOP, MVT::v8i32, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 745 CTPOP, enumerator
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64LegalizerInfo.cpp | 1944 auto CTPOP = MIRBuilder.buildCTPOP(VTy, Val); in legalizeCTPOP() local 1957 MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP() 1960 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP() 1962 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP() 1972 Register HSum = CTPOP.getReg(0); in legalizeCTPOP()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.cpp | 687 {ISD::CTPOP, MVT::v2i64, 4}, in getIntrinsicInstrCost() 688 {ISD::CTPOP, MVT::v4i32, 3}, in getIntrinsicInstrCost() 689 {ISD::CTPOP, MVT::v8i16, 2}, in getIntrinsicInstrCost() 690 {ISD::CTPOP, MVT::v16i8, 1}, in getIntrinsicInstrCost() 691 {ISD::CTPOP, MVT::i64, 4}, in getIntrinsicInstrCost() 692 {ISD::CTPOP, MVT::v2i32, 3}, in getIntrinsicInstrCost() 693 {ISD::CTPOP, MVT::v4i16, 2}, in getIntrinsicInstrCost() 694 {ISD::CTPOP, MVT::v8i8, 1}, in getIntrinsicInstrCost() 695 {ISD::CTPOP, MVT::i32, 5}, in getIntrinsicInstrCost() 699 if (const auto *Entry = CostTableLookup(CtpopCostTbl, ISD::CTPOP, MTy)) { in getIntrinsicInstrCost()
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H A D | AArch64ISelLowering.cpp | 649 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in AArch64TargetLowering() 650 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in AArch64TargetLowering() 651 setOperationAction(ISD::CTPOP, MVT::i128, Expand); in AArch64TargetLowering() 672 setOperationAction(ISD::CTPOP, MVT::i32, Custom); in AArch64TargetLowering() 673 setOperationAction(ISD::CTPOP, MVT::i64, Custom); in AArch64TargetLowering() 674 setOperationAction(ISD::CTPOP, MVT::i128, Custom); in AArch64TargetLowering() 1434 setOperationAction(ISD::CTPOP, VT, Custom); in AArch64TargetLowering() 1886 setOperationAction(ISD::CTPOP, VT, Custom); in addTypeForNEON() 2046 setOperationAction(ISD::CTPOP, VT, Default); in addTypeForFixedLengthSVE() 6888 case ISD::CTPOP: in LowerOperation() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1584 setOperationAction(ISD::CTPOP, MVT::i8, Promote); in HexagonTargetLowering() 1585 setOperationAction(ISD::CTPOP, MVT::i16, Promote); in HexagonTargetLowering() 1586 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in HexagonTargetLowering() 1587 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in HexagonTargetLowering() 1651 ISD::CTPOP, ISD::CTLZ, ISD::CTTZ, ISD::BSWAP, ISD::BITREVERSE, in HexagonTargetLowering()
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H A D | HexagonISelLoweringHVX.cpp | 203 setOperationAction(ISD::CTPOP, T, Legal); in initializeHVXLowering() 295 setOperationAction(ISD::CTPOP, T, Custom); in initializeHVXLowering() 3162 case ISD::CTPOP: in LowerHvxOperation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 108 setOperationAction(ISD::CTPOP, MVT::i8, Expand); in MSP430TargetLowering() 109 setOperationAction(ISD::CTPOP, MVT::i16, Expand); in MSP430TargetLowering()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 2337 case ISD::CTPOP: { in SimplifyDemandedBits() 4279 SDValue CTPOP = N0; in simplifySetCCWithCTPOP() local 4282 CTPOP = N0.getOperand(0); in simplifySetCCWithCTPOP() 4284 if (CTPOP.getOpcode() != ISD::CTPOP || !CTPOP.hasOneUse()) in simplifySetCCWithCTPOP() 4287 EVT CTVT = CTPOP.getValueType(); in simplifySetCCWithCTPOP() 4288 SDValue CTOp = CTPOP.getOperand(0); in simplifySetCCWithCTPOP() 9002 (!isOperationLegalOrCustom(ISD::CTPOP, VT) && in expandCTLZ() 9023 return DAG.getNode(ISD::CTPOP, dl, VT, Op); in expandCTLZ() 9122 (!isOperationLegalOrCustom(ISD::CTPOP, VT) && in expandCTTZ() 9131 if (!VT.isVector() && isOperationExpand(ISD::CTPOP, VT) && in expandCTTZ() [all …]
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H A D | SelectionDAGDumper.cpp | 485 case ISD::CTPOP: return "ctpop"; in getOperationName()
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H A D | LegalizeIntegerTypes.cpp | 74 case ISD::CTPOP: Res = PromoteIntRes_CTPOP_PARITY(N); break; in PromoteIntegerResult() 717 if (N->getOpcode() == ISD::CTPOP && !OVT.isVector() && TLI.isTypeLegal(NVT) && in PromoteIntRes_CTPOP_PARITY() 718 !TLI.isOperationLegalOrCustomOrPromote(ISD::CTPOP, NVT)) { in PromoteIntRes_CTPOP_PARITY() 751 !TLI.isOperationLegal(ISD::CTPOP, NVT) && in PromoteIntRes_CTTZ() 2793 case ISD::CTPOP: ExpandIntRes_CTPOP(N, Lo, Hi); break; in ExpandIntegerResult() 3856 Lo = DAG.getNode(ISD::ADD, dl, NVT, DAG.getNode(ISD::CTPOP, dl, NVT, Lo), in ExpandIntRes_CTPOP() 3857 DAG.getNode(ISD::CTPOP, dl, NVT, Hi)); in ExpandIntRes_CTPOP()
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H A D | LegalizeVectorOps.cpp | 382 case ISD::CTPOP: in LegalizeOp() 952 case ISD::CTPOP: in Expand()
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H A D | LegalizeDAG.cpp | 3002 if (TLI.isOperationLegalOrPromote(ISD::CTPOP, VT)) { in ExpandPARITY() 3003 Result = DAG.getNode(ISD::CTPOP, dl, VT, Op); in ExpandPARITY() 3077 case ISD::CTPOP: in ExpandNode() 5117 case ISD::CTPOP: { in PromoteNode()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 252 setOperationAction(ISD::CTPOP, MVT::v16i8, Legal); in WebAssemblyTargetLowering() 257 for (auto Op : {ISD::CTLZ, ISD::CTTZ, ISD::CTPOP}) in WebAssemblyTargetLowering() 1504 case ISD::CTPOP: in LowerOperation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 115 setOperationAction(ISD::CTPOP, VT, Expand); in BPFTargetLowering()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 206 setOperationAction(ISD::CTPOP, VT, Custom); in SystemZTargetLowering() 208 setOperationAction(ISD::CTPOP, VT, Expand); in SystemZTargetLowering() 266 setOperationAction(ISD::CTPOP, MVT::i128, Custom); in SystemZTargetLowering() 337 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in SystemZTargetLowering() 338 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in SystemZTargetLowering() 436 setOperationAction(ISD::CTPOP, VT, Legal); in SystemZTargetLowering() 438 setOperationAction(ISD::CTPOP, VT, Custom); in SystemZTargetLowering() 4448 Op = DAG.getNode(ISD::CTPOP, DL, MVT::v2i64, Op); in lowerCTPOP() 6172 case ISD::CTPOP: in LowerOperation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 167 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in R600TargetLowering() 170 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in R600TargetLowering()
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | VPIntrinsics.def | 262 VP_PROPERTY_FUNCTIONAL_SDOPC(CTPOP)
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 429 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in MipsTargetLowering() 430 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in MipsTargetLowering() 432 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in MipsTargetLowering() 433 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in MipsTargetLowering()
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H A D | MipsSEISelLowering.cpp | 333 setOperationAction(ISD::CTPOP, Ty, Legal); in addMSAIntType() 2113 return DAG.getNode(ISD::CTPOP, DL, Op->getValueType(0), Op->getOperand(1)); in lowerINTRINSIC_WO_CHAIN()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYISelLowering.cpp | 62 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in CSKYTargetLowering()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 126 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in LanaiTargetLowering()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelLowering.cpp | 82 setOperationAction(ISD::CTPOP, GRLenVT, Expand); in LoongArchTargetLowering() 265 setOperationAction({ISD::CTPOP, ISD::CTLZ}, VT, Legal); in LoongArchTargetLowering() 312 setOperationAction({ISD::CTPOP, ISD::CTLZ}, VT, Legal); in LoongArchTargetLowering() 4080 return DAG.getNode(ISD::CTPOP, DL, N->getValueType(0), N->getOperand(1)); in performINTRINSIC_WO_CHAINCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 300 setOperationAction(ISD::CTPOP, VT, Expand); in addMVEVectorTypes() 967 setOperationAction(ISD::CTPOP, MVT::v2i32, Custom); in ARMTargetLowering() 968 setOperationAction(ISD::CTPOP, MVT::v4i32, Custom); in ARMTargetLowering() 969 setOperationAction(ISD::CTPOP, MVT::v4i16, Custom); in ARMTargetLowering() 970 setOperationAction(ISD::CTPOP, MVT::v8i16, Custom); in ARMTargetLowering() 971 setOperationAction(ISD::CTPOP, MVT::v1i64, Custom); in ARMTargetLowering() 972 setOperationAction(ISD::CTPOP, MVT::v2i64, Custom); in ARMTargetLowering() 1207 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in ARMTargetLowering() 6536 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ() 6564 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1751 setOperationAction(ISD::CTPOP, MVT::i64, in SparcTargetLowering() 1883 setOperationAction(ISD::CTPOP, MVT::i32, in SparcTargetLowering()
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