| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 3647 { ISD::CTPOP, MVT::v32i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3648 { ISD::CTPOP, MVT::v64i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3649 { ISD::CTPOP, MVT::v16i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3650 { ISD::CTPOP, MVT::v32i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3651 { ISD::CTPOP, MVT::v8i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3652 { ISD::CTPOP, MVT::v16i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3655 { ISD::CTPOP, MVT::v8i64, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3656 { ISD::CTPOP, MVT::v16i32, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3657 { ISD::CTPOP, MVT::v4i64, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3658 { ISD::CTPOP, MVT::v8i32, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 768 CTPOP, enumerator
|
| H A D | SDPatternMatch.h | 1056 return UnaryOpc_match<Opnd>(ISD::CTPOP, Op);
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 2085 auto CTPOP = MIRBuilder.buildCTPOP(VTy, Val); in legalizeCTPOP() local
2098 MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP()
2101 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP()
2103 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP()
2113 Register HSum = CTPOP.getReg(0); in legalizeCTPOP()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 726 {ISD::CTPOP, MVT::v2i64, 4}, in getIntrinsicInstrCost()
727 {ISD::CTPOP, MVT::v4i32, 3}, in getIntrinsicInstrCost()
728 {ISD::CTPOP, MVT::v8i16, 2}, in getIntrinsicInstrCost()
729 {ISD::CTPOP, MVT::v16i8, 1}, in getIntrinsicInstrCost()
730 {ISD::CTPOP, MVT::i64, 4}, in getIntrinsicInstrCost()
731 {ISD::CTPOP, MVT::v2i32, 3}, in getIntrinsicInstrCost()
732 {ISD::CTPOP, MVT::v4i16, 2}, in getIntrinsicInstrCost()
733 {ISD::CTPOP, MVT::v8i8, 1}, in getIntrinsicInstrCost()
734 {ISD::CTPOP, MVT::i32, 5}, in getIntrinsicInstrCost()
738 if (const auto *Entry = CostTableLookup(CtpopCostTbl, ISD::CTPOP, MTy)) { in getIntrinsicInstrCost()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 107 setOperationAction(ISD::CTPOP, MVT::i8, Expand); in MSP430TargetLowering()
108 setOperationAction(ISD::CTPOP, MVT::i16, Expand); in MSP430TargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1652 setOperationAction(ISD::CTPOP, MVT::i8, Promote); in HexagonTargetLowering()
1653 setOperationAction(ISD::CTPOP, MVT::i16, Promote); in HexagonTargetLowering()
1654 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in HexagonTargetLowering()
1655 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in HexagonTargetLowering()
1720 ISD::CTPOP, ISD::CTLZ, ISD::CTTZ, ISD::BSWAP, ISD::BITREVERSE, in HexagonTargetLowering()
|
| H A D | HexagonISelLoweringHVX.cpp | 205 setOperationAction(ISD::CTPOP, T, Legal); in initializeHVXLowering()
299 setOperationAction(ISD::CTPOP, T, Custom); in initializeHVXLowering()
3199 case ISD::CTPOP: in LowerHvxOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 173 setOperationAction(ISD::CTPOP, MVT::i32, Custom); in XtensaTargetLowering()
1472 case ISD::CTPOP: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2405 case ISD::CTPOP: { in SimplifyDemandedBits()
4489 SDValue CTPOP = N0; in simplifySetCCWithCTPOP() local
4492 CTPOP = N0.getOperand(0); in simplifySetCCWithCTPOP()
4494 if (CTPOP.getOpcode() != ISD::CTPOP || !CTPOP.hasOneUse()) in simplifySetCCWithCTPOP()
4497 EVT CTVT = CTPOP.getValueType(); in simplifySetCCWithCTPOP()
4498 SDValue CTOp = CTPOP.getOperand(0); in simplifySetCCWithCTPOP()
9407 (!isOperationLegalOrCustom(ISD::CTPOP, VT) && in expandCTLZ()
9428 return DAG.getNode(ISD::CTPOP, dl, VT, Op); in expandCTLZ()
9527 (!isOperationLegalOrCustom(ISD::CTPOP, VT) && in expandCTTZ()
9537 if (!VT.isVector() && !isOperationLegalOrCustomOrPromote(ISD::CTPOP, VT) && in expandCTTZ()
[all …]
|
| H A D | SelectionDAGDumper.cpp | 507 case ISD::CTPOP: return "ctpop"; in getOperationName()
|
| H A D | LegalizeIntegerTypes.cpp | 74 case ISD::CTPOP: Res = PromoteIntRes_CTPOP_PARITY(N); break; in PromoteIntegerResult()
757 if (N->getOpcode() == ISD::CTPOP && !OVT.isVector() && TLI.isTypeLegal(NVT) && in PromoteIntRes_CTPOP_PARITY()
758 !TLI.isOperationLegalOrCustomOrPromote(ISD::CTPOP, NVT)) { in PromoteIntRes_CTPOP_PARITY()
791 !TLI.isOperationLegal(ISD::CTPOP, NVT) && in PromoteIntRes_CTTZ()
2976 case ISD::CTPOP: ExpandIntRes_CTPOP(N, Lo, Hi); break; in ExpandIntegerResult()
4058 if (TLI.getOperationAction(ISD::CTPOP, VT) == TargetLoweringBase::LibCall) { in ExpandIntRes_CTPOP()
4079 Lo = DAG.getNode(ISD::ADD, DL, NVT, DAG.getNode(ISD::CTPOP, DL, NVT, Lo), in ExpandIntRes_CTPOP()
4080 DAG.getNode(ISD::CTPOP, DL, NVT, Hi)); in ExpandIntRes_CTPOP()
|
| H A D | LegalizeVectorOps.cpp | 393 case ISD::CTPOP: in LegalizeOp()
1079 case ISD::CTPOP: in Expand()
|
| H A D | LegalizeDAG.cpp | 3029 if (TLI.isOperationLegalOrPromote(ISD::CTPOP, VT)) { in ExpandPARITY()
3030 Result = DAG.getNode(ISD::CTPOP, dl, VT, Op); in ExpandPARITY()
3107 case ISD::CTPOP: in ExpandNode()
5196 case ISD::CTPOP: in ConvertNodeToLibcall()
5327 case ISD::CTPOP: { in PromoteNode()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 641 ISD::BITREVERSE, ISD::CTLZ, ISD::CTPOP, ISD::CTTZ, in NVPTXTargetLowering()
791 setOperationAction({ISD::CTPOP, ISD::CTLZ, ISD::CTLZ_ZERO_UNDEF}, MVT::i16, in NVPTXTargetLowering()
793 setOperationAction({ISD::CTPOP, ISD::CTLZ}, MVT::i32, Legal); in NVPTXTargetLowering()
794 setOperationAction({ISD::CTPOP, ISD::CTLZ}, MVT::i64, Custom); in NVPTXTargetLowering()
801 setI16x2OperationAction(ISD::CTPOP, MVT::v2i16, Legal, Expand); in NVPTXTargetLowering()
2968 case ISD::CTPOP: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 123 setOperationAction(ISD::CTPOP, VT, Expand); in BPFTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 171 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in R600TargetLowering()
174 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in R600TargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 276 setOperationAction(ISD::CTPOP, MVT::v16i8, Legal); in WebAssemblyTargetLowering()
281 for (auto Op : {ISD::CTLZ, ISD::CTTZ, ISD::CTPOP}) in WebAssemblyTargetLowering()
1682 case ISD::CTPOP: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | VPIntrinsics.def | 234 VP_PROPERTY_FUNCTIONAL_SDOPC(CTPOP)
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 215 setOperationAction(ISD::CTPOP, VT, Custom); in SystemZTargetLowering()
217 setOperationAction(ISD::CTPOP, VT, Expand); in SystemZTargetLowering()
285 setOperationAction(ISD::CTPOP, MVT::i128, Custom); in SystemZTargetLowering()
359 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in SystemZTargetLowering()
360 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in SystemZTargetLowering()
468 setOperationAction(ISD::CTPOP, VT, Legal); in SystemZTargetLowering()
470 setOperationAction(ISD::CTPOP, VT, Custom); in SystemZTargetLowering()
4923 Op = DAG.getNode(ISD::CTPOP, DL, MVT::v2i64, Op); in lowerCTPOP()
7068 case ISD::CTPOP: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 437 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in MipsTargetLowering()
438 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in MipsTargetLowering()
440 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in MipsTargetLowering()
441 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in MipsTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 62 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in CSKYTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 124 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in LanaiTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 305 setOperationAction(ISD::CTPOP, VT, Expand); in addMVEVectorTypes()
965 setOperationAction(ISD::CTPOP, MVT::v2i32, Custom); in ARMTargetLowering()
966 setOperationAction(ISD::CTPOP, MVT::v4i32, Custom); in ARMTargetLowering()
967 setOperationAction(ISD::CTPOP, MVT::v4i16, Custom); in ARMTargetLowering()
968 setOperationAction(ISD::CTPOP, MVT::v8i16, Custom); in ARMTargetLowering()
969 setOperationAction(ISD::CTPOP, MVT::v1i64, Custom); in ARMTargetLowering()
970 setOperationAction(ISD::CTPOP, MVT::v2i64, Custom); in ARMTargetLowering()
1211 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in ARMTargetLowering()
1212 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in ARMTargetLowering()
6602 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 84 setOperationAction(ISD::CTPOP, GRLenVT, Expand); in LoongArchTargetLowering()
304 setOperationAction({ISD::CTPOP, ISD::CTLZ}, VT, Legal); in LoongArchTargetLowering()
332 setOperationAction(ISD::CTPOP, GRLenVT, Legal); in LoongArchTargetLowering()
371 setOperationAction({ISD::CTPOP, ISD::CTLZ}, VT, Legal); in LoongArchTargetLowering()
5575 return DAG.getNode(ISD::CTPOP, DL, N->getValueType(0), N->getOperand(1)); in performINTRINSIC_WO_CHAINCombine()
|