| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrHTM.td | 30 let Defs = [CR0] in {
90 // All HTM instructions, with the exception of tcheck, set CR0 with the
92 // instruction is executed. For tbegin., the EQ bit in CR0 can be used
|
| H A D | PPCMacroFusion.cpp | 172 if (!BT.isReg() || (!BT.getReg().isVirtual() && BT.getReg() != PPC::CR0)) in checkOpConstraints()
183 if (!BT.isReg() || (!BT.getReg().isVirtual() && BT.getReg() != PPC::CR0)) in checkOpConstraints()
|
| H A D | PPCExpandAtomicPseudoInsts.cpp | 204 .addReg(PPC::CR0) in expandAtomicRMW128()
269 .addReg(PPC::CR0) in expandAtomicCmpSwap128()
280 .addReg(PPC::CR0) in expandAtomicCmpSwap128()
|
| H A D | PPCInstrInfo.td | 781 let Defs = [CR0] in
796 let Defs = [CARRY, CR0] in
811 let Defs = [CARRY, CR0] in
825 let Defs = [CR0] in
839 let Defs = [CR0] in
855 let Defs = [CR0] in
865 let Defs = [XER, CR0] in
881 let Defs = [CR0] in
892 let Defs = [XER, CR0] in
907 let Defs = [CARRY, CR0] in
[all …]
|
| H A D | PPCInstrFuture.td | 41 let Defs = [CR0] in
|
| H A D | PPCRegisterInfo.h | 30 Reg = PPC::CR0; in getCRFromCRBit()
|
| H A D | PPCInstr64Bit.td | 292 let Defs = [CR0] in {
349 // LQARXL is not really altering CR0.
360 let Defs = [CR0], mayStore = 1, mayLoad = 0, hasSideEffects = 0 in {
380 Defs = [CR0],
661 let Defs = [CR0] in {
1551 let Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7], Size = 8 in
1553 let Defs = [X0,X2,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7], Size = 8 in
1558 let Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1560 let Defs = [X0,X2,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1568 let Defs = [X0,X4,X5,X11,LR8,CR0] in {
[all …]
|
| H A D | PPCInstrInfo.cpp | 2574 if (&*I != &CmpInstr && (Instr.modifiesRegister(PPC::CR0, TRI) || in optimizeCompareInstr()
2575 Instr.readsRegister(PPC::CR0, TRI))) in optimizeCompareInstr()
2693 .addReg(PPC::CR0, MIOpC != NewOpC ? RegState::Kill : 0); in optimizeCompareInstr()
2697 MI->clearRegisterDeads(PPC::CR0); in optimizeCompareInstr()
2770 assert(MI->definesRegister(PPC::CR0, /*TRI=*/nullptr) && in optimizeCompareInstr()
2825 if (CRReg != PPC::CR0) in optimizeCmpPostRA()
2850 assert(SrcMI->definesRegister(PPC::CR0, /*TRI=*/nullptr) && in optimizeCmpPostRA()
3357 .addImm(LII.Imm).addReg(PPC::CR0, RegState::ImplicitDefine); in replaceInstrWithLI()
|
| H A D | PPCRegisterInfo.cpp | 982 if (SrcReg != PPC::CR0) { in lowerCRSpilling()
1027 if (DestReg != PPC::CR0) { in lowerCRRestore()
|
| H A D | PPCRegisterInfo.td | 280 def CR0 : CR<0, "cr0", [CR0LT, CR0GT, CR0EQ, CR0UN]>, DwarfRegNum<[68, 68]>;
469 (add CR0, CR1, CR5, CR6,
|
| H A D | PPCFrameLowering.cpp | 1372 Register CRReg = PPC::CR0; in inlineStackProbe()
|
| H A D | PPCISelLowering.cpp | 12970 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB); in EmitAtomicBinary()
13229 .addReg(PPC::CR0) in EmitPartwordAtomicBinary()
14072 .addReg(PPC::CR0) in EmitInstrWithCustomInserter()
14245 .addReg(PPC::CR0) in EmitInstrWithCustomInserter()
17410 DAG.getRegister(PPC::CR0, MVT::i32), N->getOperand(4), in PerformDAGCombine()
17821 R.first = PPC::CR0; in getRegForInlineAsmConstraint()
|
| /freebsd/contrib/llvm-project/clang/lib/Headers/ |
| H A D | htmintrin.h | 26 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3) argument
|
| /freebsd/sys/dev/xdma/controller/ |
| H A D | pl330.h | 69 #define CR0 0xE00 /* Configuration Register 0 */ macro
|
| /freebsd/contrib/llvm-project/libc/include/llvm-libc-macros/linux/ |
| H A D | termios-macros.h | 48 #define CR0 0000000 // Carriage-return delay type 0 macro
|
| /freebsd/include/rpcsvc/ |
| H A D | rex.x | 115 const CR0 = 0x00000000; variable
|
| /freebsd/sys/sys/ |
| H A D | ioctl_compat.h | 101 #define CR0 0x00000000 macro
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
| H A D | CodeViewRegisters.def | 32 #pragma push_macro("CR0")
95 CV_REGISTER(CR0, 80)
363 #pragma pop_macro("CR0")
|
| /freebsd/tools/tools/nanobsd/ |
| H A D | defaults.sh | 336 CR0() { function
970 CR0 "${PKGCMD} info"
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 459 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding()
486 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); in getMachineOpValue()
|
| H A D | PPCInstPrinter.cpp | 499 case PPC::CR0: RegNo = 0; break; in printcrbitm()
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | GuardWidening.cpp | 739 ConstantRange CR0 = in mergeChecks() local
748 CR0.exactIntersectWith(CR1)) { in mergeChecks()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 510 ENTRY(CR0) \
|
| /freebsd/stand/i386/btx/btx/ |
| H A D | btx.S | 243 movl %cr0,%eax # Get CR0
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.td | 510 def CR0 : X86Reg<"cr0", 0>;
|