/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.h | 43 CMOV, enumerator
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H A D | ARCISelLowering.cpp | 185 case ARCISD::CMOV: in getTargetNodeName() 213 return DAG.getNode(ARCISD::CMOV, dl, TVal.getValueType(), TVal, FVal, in LowerSELECT_CC()
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H A D | ARCInstrInfo.td | 55 def ARCcmov : SDNode<"ARCISD::CMOV", SDT_ARCcmov, [SDNPInGlue]>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FlagsCopyLowering.cpp | 846 case X86::CMOV##A##_Fp32: \ in getImplicitCondFromMI() 847 case X86::CMOV##A##_Fp64: \ in getImplicitCondFromMI() 848 case X86::CMOV##A##_Fp80: \ in getImplicitCondFromMI()
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H A D | X86InstrCMovSetCC.td | 15 // CMOV instructions.
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H A D | X86ISelLowering.h | 117 CMOV, enumerator
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H A D | X86InstrFragments.td | 159 def X86cmov : SDNode<"X86ISD::CMOV", SDTX86Cmov>;
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H A D | X86ISelLowering.cpp | 24324 SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, T1.getValueType(), T2, T1, in LowerSELECT() 24342 SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, MVT::i32, Ops); in LowerSELECT() 24349 return DAG.getNode(X86ISD::CMOV, DL, Op.getValueType(), Ops, Op->getFlags()); in LowerSELECT() 27149 SDValue isValid = DAG.getNode(X86ISD::CMOV, dl, Op->getValueType(1), Ops); in LowerINTRINSIC_W_CHAIN() 28081 Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, Ops); in LowerCTLZ() 28115 return DAG.getNode(X86ISD::CMOV, dl, VT, Ops); in LowerCTTZ() 28218 return DAG.getNode(X86ISD::CMOV, DL, VT, Ops); in LowerABS() 33695 NODE_NAME_CASE(CMOV) in getTargetNodeName() 37402 case X86ISD::CMOV: { in computeKnownBitsForTargetNode() 37741 case X86ISD::CMOV: { in ComputeNumSignBitsForTargetNode() [all …]
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H A D | X86InstrCompiler.td | 550 // CMOV* - Used to implement the SELECT DAG operation. Expanded after 553 def CMOV#NAME : I<0, Pseudo,
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H A D | X86InstrAsmAlias.td | 765 // CMOV SETCC SETZUCC Aliases
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/freebsd/sys/contrib/xen/arch-x86/ |
H A D | cpufeatureset.h | 109 XEN_CPUFEATURE(CMOV, 0*32+15) /*A CMOV instruction (FCMOVCC and FCOMI too if FPU present)…
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEISelLowering.h | 31 CMOV, // Select between two values using the result of comparison. enumerator
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H A D | VEInstrInfo.td | 460 def cmov : SDNode<"VEISD::CMOV", SDT_Cmov>; 723 // Multiclass for CMOV instructions. 1313 // Section 8.5.11 - CMOV (Conditional Move) 2029 // CMOV %res, (63)0, %tmp ; set 1 if %tmp is true 2053 // Generic CMOV pattern matches 2054 // CMOV accepts i64 $t, $f, and result. So, we extend it to support 2057 // CMOV for i32 2077 // CMOV for f32 2098 // CMOV for f64 2111 // CMOV for f128
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H A D | VEISelLowering.cpp | 938 TARGET_NODE_CASE(CMOV) in getTargetNodeName() 2825 return DAG.getNode(VEISD::CMOV, DL, VT, Ops); in combineSelect() 2893 return DAG.getNode(VEISD::CMOV, DL, VT, Ops); in combineSelectCC() 2932 case VEISD::CMOV: in isI32Insn() 2975 User->getOpcode() == ISD::SELECT || User->getOpcode() == VEISD::CMOV) in isI32InsnAllUses()
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.h | 63 CMOV, enumerator
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H A D | M68kInstrCompiler.td | 53 // CMOV* - Used to implement the SELECT DAG operation. Expanded after
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H A D | M68kISelLowering.cpp | 2404 SDValue Cmov = DAG.getNode(M68kISD::CMOV, DL, VTs, T2, T1, CC, Cond); in LowerSELECT() 2424 return DAG.getNode(M68kISD::CMOV, DL, VTs, Ops); in LowerSELECT() 3682 case M68kISD::CMOV: in getTargetNodeName()
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H A D | M68kInstrInfo.td | 133 def MxCmov : SDNode<"M68kISD::CMOV", MxSDT_Cmov>;
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/freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/ |
H A D | X86TargetParser.def | 141 X86_FEATURE_COMPAT(CMOV, "cmov", 0)
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVSchedSiFiveP400.td | 62 // CMOV
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H A D | RISCVSchedSiFiveP600.td | 115 // CMOV
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 97 CMOV, // ARM conditional move instructions. enumerator
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H A D | ARMISelLowering.cpp | 1728 MAKE_CASE(ARMISD::CMOV) in getTargetNodeName() 5011 SDValue Overflow = DAG.getNode(ARMISD::CMOV, dl, VT, TVal, FVal, in LowerSignedALUO() 5161 if (Cond.getOpcode() == ARMISD::CMOV && Cond.hasOneUse()) { in LowerSELECT() 5266 SDValue Low = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseLow, TrueLow, in getCMOV() 5268 SDValue High = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseHigh, TrueHigh, in getCMOV() 5273 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR, in getCMOV() 6346 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, LoBigShift, in LowerShiftRightParts() 6356 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftRightParts() 6389 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftLeftParts() 6395 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, in LowerShiftLeftParts() [all …]
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H A D | ARMISelDAGToDAG.cpp | 4237 case ARMISD::CMOV: { in Select() 4260 CurDAG->MorphNodeTo(N, ARMISD::CMOV, N->getVTList(), Ops); in Select()
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H A D | ARMInstrFormats.td | 170 // Selectable predicate operand for CMOV instructions. We can't use a normal
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