| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstCombineIntrinsic.cpp | 844 int64_t CCVal = CC->getZExtValue(); in instCombineIntrinsic() local
846 if ((IsInteger && (CCVal < CmpInst::FIRST_ICMP_PREDICATE || in instCombineIntrinsic()
847 CCVal > CmpInst::LAST_ICMP_PREDICATE)) || in instCombineIntrinsic()
848 (!IsInteger && (CCVal < CmpInst::FIRST_FCMP_PREDICATE || in instCombineIntrinsic()
849 CCVal > CmpInst::LAST_FCMP_PREDICATE))) in instCombineIntrinsic()
858 (ICmpInst::Predicate)CCVal, CSrc0, CSrc1, DL); in instCombineIntrinsic()
882 CmpInst::getSwappedPredicate(static_cast<CmpInst::Predicate>(CCVal)); in instCombineIntrinsic()
890 if (CCVal != CmpInst::ICMP_EQ && CCVal != CmpInst::ICMP_NE) in instCombineIntrinsic()
899 if (CCVal == CmpInst::ICMP_EQ && in instCombineIntrinsic()
929 if (CCVal == CmpInst::ICMP_EQ) in instCombineIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6948 ISD::CondCode CCVal = cast<CondCodeSDNode>(Op.getOperand(2))->get(); in LowerOperation() local
6949 assert((CCVal == ISD::SETGT || CCVal == ISD::SETUGT) && in LowerOperation()
6963 if (CCVal == ISD::SETUGT && Imm == -1) in LowerOperation()
6966 CCVal = ISD::getSetCCSwappedOperands(CCVal); in LowerOperation()
6968 DL, VT, LHS, DAG.getConstant(Imm + 1, DL, OpVT), CCVal); in LowerOperation()
6975 CCVal = ISD::getSetCCSwappedOperands(CCVal); in LowerOperation()
6976 return DAG.getSetCC(DL, VT, RHS, LHS, CCVal); in LowerOperation()
7819 ISD::CondCode CCVal = cast<CondCodeSDNode>(CondV.getOperand(2))->get(); in lowerSELECT() local
7829 CCVal == ISD::SETLT) { in lowerSELECT()
7838 translateSetCCForBranch(DL, LHS, RHS, CCVal, DAG); in lowerSELECT()
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| H A D | RISCVISelDAGToDAG.cpp | 2833 ISD::CondCode CCVal = cast<CondCodeSDNode>(N->getOperand(2))->get(); in selectSETCC() local
2834 if (CCVal != ExpectedCCVal) in selectSETCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 191 unsigned CCVal; member
394 return CC.CCVal; in getCCVal()
617 static std::unique_ptr<VEOperand> CreateCCOp(unsigned CCVal, SMLoc S, in CreateCCOp() argument
620 Op->CC.CCVal = CCVal; in CreateCCOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4090 SDValue CCVal = DAG.getConstant(getInvertedCondCode(CC), dl, MVT::i32); in LowerXOR() local
4092 CCVal, Overflow); in LowerXOR()
4134 SDValue CCVal; in LowerXOR() local
4135 SDValue Cmp = getAArch64Cmp(LHS, RHS, CC, CCVal, DAG, dl); in LowerXOR()
4142 CCVal, Cmp); in LowerXOR()
4230 SDValue CCVal = DAG.getConstant(getInvertedCondCode(CC), dl, MVT::i32); in LowerXALUO() local
4232 CCVal, Overflow); in LowerXALUO()
6619 SDValue CCVal = DAG.getConstant(CC, dl, MVT::i32); in LowerBRCOND() local
6620 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
9842 SDValue CCVal = DAG.getConstant(OFCC, dl, MVT::i32); in LowerBR_CC() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 24828 SDValue CCVal = DAG.getTargetConstant(X86Cond, dl, MVT::i8); in LowerBRCOND() local
24829 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24834 SDValue CCVal; in LowerBRCOND() local
24835 SDValue EFLAGS = emitFlagsForSetcc(LHS, RHS, CC, SDLoc(Cond), DAG, CCVal); in LowerBRCOND()
24836 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24861 SDValue CCVal = DAG.getTargetConstant(X86::COND_NE, dl, MVT::i8); in LowerBRCOND() local
24863 CCVal, Cmp); in LowerBRCOND()
24864 CCVal = DAG.getTargetConstant(X86::COND_P, dl, MVT::i8); in LowerBRCOND()
24865 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24874 SDValue CCVal = DAG.getTargetConstant(X86::COND_NE, dl, MVT::i8); in LowerBRCOND() local
[all …]
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