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Searched refs:BuildVec (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVPreLegalizer.cpp69 auto *BuildVec = MRI.getVRegDef(SrcReg); in addConstantsToTrack() local
70 assert(BuildVec && in addConstantsToTrack()
71 BuildVec->getOpcode() == TargetOpcode::G_BUILD_VECTOR); in addConstantsToTrack()
78 GR->add(ElemConst, &MF, BuildVec->getOperand(1 + i).getReg()); in addConstantsToTrack()
80 BuildVec->getOperand(1 + i).setReg(ElemReg); in addConstantsToTrack()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp516 Register BuildVec; in buildCopyFromRegs() local
518 BuildVec = B.buildBuildVector(BVType, Regs).getReg(0); in buildCopyFromRegs()
547 BuildVec = B.buildBuildVector(BVType, BVRegs).getReg(0); in buildCopyFromRegs()
549 B.buildTrunc(OrigRegs[0], BuildVec); in buildCopyFromRegs()
H A DLegalizerHelper.cpp7606 SmallVector<Register, 32> BuildVec; in lowerShuffleVector() local
7613 BuildVec.push_back(Undef); in lowerShuffleVector()
7618 BuildVec.push_back(Idx == 0 ? Src0Reg : Src1Reg); in lowerShuffleVector()
7625 BuildVec.push_back(Extract.getReg(0)); in lowerShuffleVector()
7630 MIRBuilder.buildCopy(DstReg, BuildVec[0]); in lowerShuffleVector()
7632 MIRBuilder.buildBuildVector(DstReg, BuildVec); in lowerShuffleVector()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp6190 SDValue BuildVec = DAG.getBuildVector(ResVT, DL, ScalarRes); in ReplaceLoadVector() local
6192 Results.push_back(BuildVec); in ReplaceLoadVector()
6302 SDValue BuildVec = in ReplaceINTRINSIC_W_CHAIN() local
6305 Results.push_back(BuildVec); in ReplaceINTRINSIC_W_CHAIN()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp1822 if (auto *BuildVec = dyn_cast<BuildVectorSDNode>(N)) { in getSplatValue() local
1823 return BuildVec->getSplatValue(); in getSplatValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp4076 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {Hi, NewShift}); in performSraCombine() local
4077 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec); in performSraCombine()
4085 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, NewShift}); in performSraCombine() local
4086 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec); in performSraCombine()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp24929 SDValue BuildVec = in visitEXTRACT_SUBVECTOR() local
24931 return DAG.getBitcast(NVT, BuildVec); in visitEXTRACT_SUBVECTOR()