| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | BitTracker.h | 39 struct BitMask;
287 struct BitTracker::BitMask { struct
288 BitMask() = default;
289 BitMask(uint16_t b, uint16_t e) : B(b), E(e) {} in BitMask() argument
317 RegisterCell &insert(const RegisterCell &RC, const BitMask &M); argument
318 RegisterCell extract(const BitMask &M) const; // Returns a new cell.
465 virtual BitMask mask(Register Reg, unsigned Sub) const;
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| H A D | BitTracker.cpp | 215 const BitMask &M) { in insert()
235 BT::RegisterCell BT::RegisterCell::extract(const BitMask &M) const { in extract()
368 BitMask M = mask(RR.Reg, RR.Sub); in getCell()
690 RegisterCell Res = RegisterCell::ref(A1).extract(BT::BitMask(B, Last)); in eXTR()
703 Res.insert(RegisterCell::ref(A2), BT::BitMask(AtN, AtN+W2-1)); in eINS()
707 BT::BitMask BT::MachineEvaluator::mask(Register Reg, unsigned Sub) const { in mask()
711 return BitMask(0, W-1); in mask()
752 Res.insert(Src, BitMask(0, WS-1)); in evaluate()
1002 BitMask OM = ME.mask(OldRR.Reg, OldRR.Sub); in subst()
1003 BitMask NM = ME.mask(NewRR.Reg, NewRR.Sub); in subst()
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| H A D | HexagonBitTracker.h | 39 BitTracker::BitMask mask(Register Reg, unsigned Sub) const override;
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| H A D | HexagonBitTracker.cpp | 89 BT::BitMask HexagonEvaluator::mask(Register Reg, unsigned Sub) const { in mask()
101 return IsSubLo ? BT::BitMask(0, RW-1) in mask()
102 : BT::BitMask(RW, 2*RW-1); in mask()
349 RegisterCell RC = RegisterCell(RW).insert(PC, BT::BitMask(0, PW-1)); in evaluate()
371 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1)); in evaluate()
726 RegisterCell RC = RegisterCell(W0).insert(Ext, BT::BitMask(0, Wd-1)); in evaluate()
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| /freebsd/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | Integral.h | 154 const ReprT BitMask = (ReprT(1) << ReprT(TruncBits)) - 1;
156 const ReprT ExtMask = ~BitMask;
157 return Integral((V & BitMask) | (Signed && (V & SignBit) ? ExtMask : 0));
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
| H A D | LowerTypeTests.cpp | 463 Constant *BitMask; member
589 Value *BitMask = B.CreateShl(ConstantInt::get(BitsType, 1), BitIndex); in createMaskedBitTest() local
590 Value *MaskedBits = B.CreateAnd(Bits, BitMask); in createMaskedBitTest()
687 B.CreateAnd(Byte, ConstantExpr::getPtrToInt(TIL.BitMask, Int8Ty)); in createBitSetTest()
947 ExportGlobal("bit_mask", TIL.BitMask); in exportTypeId()
949 return &TTRes.BitMask; in exportTypeId()
1021 TIL.BitMask = ImportConstant("bit_mask", TTRes.BitMask, 8, Int8PtrTy); in importTypeId()
1155 TIL.BitMask = BAI->MaskGlobal; in lowerTypeTestCalls()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | BypassSlowDivision.cpp | 341 uint64_t BitMask = ~BypassType->getBitMask(); in insertOperandRuntimeCheck() local
342 Value *AndV = Builder.CreateAnd(OrV, BitMask); in insertOperandRuntimeCheck()
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| H A D | SimplifyCFG.cpp | 6098 APInt BitMask = APInt::getZero(MinCaseVal->getBitWidth()); in foldSwitchToSelect() local
6100 BitMask |= (Case->getValue() - MinCaseVal->getValue()); in foldSwitchToSelect()
6104 if (BitMask.popcount() == Log2_32(CaseCount)) { in foldSwitchToSelect()
6107 Value *And = Builder.CreateAnd(Condition, ~BitMask, "switch.and"); in foldSwitchToSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopIdiomRecognize.cpp | 2421 Value *&BitMask, Value *&BitPos, in detectShiftUntilBitTestIdiom() argument
2457 m_Value(BitMask), in detectShiftUntilBitTestIdiom()
2464 m_CombineAnd(m_Value(BitMask), m_Power2()))) && in detectShiftUntilBitTestIdiom()
2465 (BitPos = ConstantExpr::getExactLogBase2(cast<Constant>(BitMask))); in detectShiftUntilBitTestIdiom()
2471 (BitMask = ConstantInt::get(CurrX->getType(), Mask)) && in detectShiftUntilBitTestIdiom()
2576 Value *X, *BitMask, *BitPos, *XCurr; in recognizeShiftUntilBitTest() local
2578 if (!detectShiftUntilBitTestIdiom(CurLoop, X, BitMask, BitPos, XCurr, in recognizeShiftUntilBitTest()
2646 Value *LowBitMask = Builder.CreateAdd(BitMask, Constant::getAllOnesValue(Ty), in recognizeShiftUntilBitTest()
2649 Builder.CreateOr(LowBitMask, BitMask, BitPos->getName() + ".mask"); in recognizeShiftUntilBitTest()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineOperand.cpp | 607 unsigned BitMask = Flags.second; in printTargetFlags() local
611 if ((BitMask & Mask.first) == Mask.first) { in printTargetFlags()
617 BitMask &= ~(Mask.first); in printTargetFlags()
620 if (BitMask) { in printTargetFlags()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ModuleSummaryIndexYAML.h | 35 io.mapOptional("BitMask", res.BitMask);
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| H A D | ModuleSummaryIndex.h | 1230 uint8_t BitMask = 0;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | VOP3PInstructions.td | 296 class Extract<int FromBitIndex, int BitMask, bit U>: PatFrag<
298 …!if (!or (!and (!eq (BitMask, 255), !eq (FromBitIndex, 24)), !eq (FromBitIndex, 28)), // last elem…
301 !if (U, (and node:$src, (i32 BitMask)),
302 … !if (!eq (BitMask, 15), (!cast<PatFrag>("ExtractSigned4bit_"#FromBitIndex) node:$src),
304 !if (U, (and (srl node:$src, (i32 FromBitIndex)), (i32 BitMask)),
305 … !if (!eq (BitMask, 15), (!cast<PatFrag>("ExtractSigned4bit_"#FromBitIndex) node:$src),
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| H A D | SIISelLowering.cpp | 11843 uint32_t BitMask = BitMaskOp->getZExtValue(); in calculateByteProvider() local
11847 if ((IndexMask & BitMask) != IndexMask) { in calculateByteProvider()
11850 if (IndexMask & BitMask) in calculateByteProvider()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/ |
| H A D | PPCTargetParser.def | 113 // PPC_LNX_FEATURE(Name, Description, EnumName, BitMask, PPC_FAWORD_WORD)
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| /freebsd/contrib/llvm-project/llvm/lib/LTO/ |
| H A D | LTO.cpp | 308 AddUint64(S.TTRes.BitMask); in computeLTOCacheKey()
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AsmWriter.cpp | 3157 if (TTRes.BitMask) in printTypeTestResolution()
3159 Out << ", bitMask: " << (unsigned)TTRes.BitMask; in printTypeTestResolution()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 1530 SDValue BitMask = DAG.getConstant(~BitImm, DL, ResTy); in lowerMSABitClearImm() local
1532 return DAG.getNode(ISD::AND, DL, ResTy, Op->getOperand(1), BitMask); in lowerMSABitClearImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 8820 const MCExpr *BitMask; in ParseDirective() local
8823 if (Parser.parseExpression(BitMask)) { in ParseDirective()
8828 if (!BitMask->evaluateAsAbsolute(BitMaskVal)) { in ParseDirective()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 12273 SDValue BitMask = getConstVector(Bits, VT, DAG, DL); in lowerShuffleAsElementInsertion() local
12274 V1 = DAG.getNode(ISD::AND, DL, VT, V1, BitMask); in lowerShuffleAsElementInsertion()
29372 SDValue BitMask = DAG.getConstant(-1, dl, ExtVT); in LowerShiftByScalarVariable() local
29373 BitMask = getTargetVShiftNode(LogicalX86Op, dl, ExtVT, BitMask, in LowerShiftByScalarVariable()
29376 BitMask = getTargetVShiftByConstNode(LogicalX86Op, dl, ExtVT, BitMask, in LowerShiftByScalarVariable()
29378 BitMask = DAG.getBitcast(VT, BitMask); in LowerShiftByScalarVariable()
29379 BitMask = DAG.getVectorShuffle(VT, dl, BitMask, BitMask, in LowerShiftByScalarVariable()
29386 Res = DAG.getNode(ISD::AND, dl, VT, Res, BitMask); in LowerShiftByScalarVariable()
39080 SDValue BitMask = getConstVector(EltBits, UndefElts, MaskVT, DAG, DL); in combineX86ShuffleChain() local
39084 Res = DAG.getNode(AndOpcode, DL, MaskVT, Res, BitMask); in combineX86ShuffleChain()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 7945 SDValue BitMask = DAG.getConstant(BW - 1, DL, ShVT); in expandVPFunnelShift() local
7948 ShAmt = DAG.getNode(ISD::VP_AND, DL, ShVT, Z, BitMask, Mask, VL); in expandVPFunnelShift()
7952 InvShAmt = DAG.getNode(ISD::VP_AND, DL, ShVT, NotZ, BitMask, Mask, VL); in expandVPFunnelShift()
7956 InvShAmt = DAG.getNode(ISD::VP_SUB, DL, ShVT, BitMask, ShAmt, Mask, VL); in expandVPFunnelShift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7101 uint64_t BitMask = 0xff; in isVMOVModifiedImm() local
7105 if (((SplatBits | SplatUndef) & BitMask) == BitMask) { in isVMOVModifiedImm()
7107 } else if ((SplatBits & BitMask) != 0) { in isVMOVModifiedImm()
7110 BitMask <<= 8; in isVMOVModifiedImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Bitcode/Writer/ |
| H A D | BitcodeWriter.cpp | 4140 NameVals.push_back(Summary.TTRes.BitMask); in writeTypeIdSummaryRecord()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 16959 unsigned BitMask; in EmitPPCBuiltinExpr() local
16960 std::tie(FeatureWord, BitMask) = in EmitPPCBuiltinExpr()
16966 if (!BitMask) in EmitPPCBuiltinExpr()
16972 Builder.CreateAnd(TheCall, llvm::ConstantInt::get(Int32Ty, BitMask)); in EmitPPCBuiltinExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 7444 TypeId.TTRes.BitMask = Record[Slot++]; in parseTypeIdSummaryRecord()
|