| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVGatherScatterLowering.cpp | 72 PHINode *&BasePtr, BinaryOperator *&Inc,
195 PHINode *&BasePtr, in matchStridedRecurrence() argument
225 BasePtr = in matchStridedRecurrence()
227 Inc = BinaryOperator::CreateAdd(BasePtr, Step, Inc->getName() + ".scalar", in matchStridedRecurrence()
229 BasePtr->addIncoming(Start, Phi->getIncomingBlock(1 - IncrementingBlock)); in matchStridedRecurrence()
230 BasePtr->addIncoming(Inc, Phi->getIncomingBlock(IncrementingBlock)); in matchStridedRecurrence()
283 if (!matchStridedRecurrence(Index, L, Stride, BasePtr, Inc, Builder)) in matchStridedRecurrence()
287 unsigned StepIndex = Inc->getOperand(0) == BasePtr ? 1 : 0; in matchStridedRecurrence()
288 unsigned StartBlock = BasePtr->getOperand(0) == Inc ? 1 : 0; in matchStridedRecurrence()
290 Value *Start = BasePtr->getOperand(StartBlock); in matchStridedRecurrence()
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| H A D | RISCVCodeGenPrepare.cpp | 248 Value *BasePtr, *VL; in expandVPStrideLoad() local
252 m_Value(BasePtr), m_Zero(), m_AllOnes(), m_Value(VL)))) in expandVPStrideLoad()
267 Value *Val = Builder.CreateLoad(STy, BasePtr); in expandVPStrideLoad()
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| H A D | RISCVInterleavedAccess.cpp | 107 Value *BasePtr = Builder.CreatePtrAdd(LI->getPointerOperand(), Offset); in lowerInterleavedLoad() local
113 {VTy, BasePtr->getType(), Stride->getType()}, in lowerInterleavedLoad()
114 {BasePtr, Stride, Mask, VL}); in lowerInterleavedLoad()
192 Value *BasePtr = Builder.CreatePtrAdd(SI->getPointerOperand(), Offset); in lowerInterleavedStore() local
198 {Data->getType(), BasePtr->getType(), Stride->getType()}, in lowerInterleavedStore()
199 {Data, BasePtr, Stride, Mask, VL}); in lowerInterleavedStore()
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| /freebsd/contrib/llvm-project/clang/lib/AST/ByteCode/ |
| H A D | EvaluationResult.cpp | 64 const Pointer &BasePtr, const Record *R);
67 const Pointer &BasePtr, in CheckArrayInitialized() argument
74 const Record *R = BasePtr.getElemRecord(); in CheckArrayInitialized()
76 Pointer ElemPtr = BasePtr.atIndex(I).narrow(); in CheckArrayInitialized()
81 Pointer ElemPtr = BasePtr.atIndex(I).narrow(); in CheckArrayInitialized()
86 if (!BasePtr.atIndex(I).isInitialized()) { in CheckArrayInitialized()
87 DiagnoseUninitializedSubobject(S, Loc, BasePtr.getField()); in CheckArrayInitialized()
97 const Pointer &BasePtr, const Record *R) { in CheckFieldsInitialized() argument
102 Pointer FieldPtr = BasePtr.atField(F.Offset); in CheckFieldsInitialized()
127 Pointer P = BasePtr.atField(B.Offset); in CheckFieldsInitialized()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.cpp | 52 BasePtr = M68k::A4; in M68kRegisterInfo()
183 unsigned BasePtr; in eliminateFrameIndex() local
185 BasePtr = (FIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex()
187 BasePtr = (FIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex()
189 BasePtr = StackPtr; in eliminateFrameIndex()
191 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex()
193 Base.ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
207 if (BasePtr == StackPtr) in eliminateFrameIndex()
257 return MRI->canReserveReg(BasePtr); in canRealignStack()
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| H A D | M68kRegisterInfo.h | 42 unsigned BasePtr; variable
109 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 78 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo()
83 BasePtr = X86::ESI; in X86RegisterInfo()
583 Register BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs() local
584 for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr)) in getReservedRegs()
806 return MRI->canReserveReg(BasePtr); in canRealignStack()
831 Register BasePtr = MI.getOperand(1).getReg(); in tryOptimizeLEAtoMOV() local
836 BasePtr = getX86SubSuperRegister(BasePtr, 32); in tryOptimizeLEAtoMOV()
840 TII->copyPhysReg(*MI.getParent(), II, MI.getDebugLoc(), NewDestReg, BasePtr, in tryOptimizeLEAtoMOV()
874 assert(BasePtr == FramePtr && "Expected the FP as base register"); in eliminateFrameIndex()
911 Register BasePtr; in eliminateFrameIndex() local
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| H A D | X86RegisterInfo.h | 53 unsigned BasePtr; variable
165 Register getBaseRegister() const { return BasePtr; } in getBaseRegister()
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| H A D | X86ArgumentStackSlotRebase.cpp | 120 Register BasePtr = TRI->getBaseRegister(); in runOnMachineFunction() local
132 if (TRI->isSuperOrSubRegisterEq(BasePtr, Reg)) in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULowerKernelAttributes.cpp | 350 Function *BasePtr = getBasePtrIntrinsic(M, IsV5OrAbove); in runOnModule() local
352 if (!BasePtr) // ImplicitArgPtr/DispatchPtr not used. in runOnModule()
356 for (auto *U : BasePtr->users()) { in runOnModule()
383 Function *BasePtr = getBasePtrIntrinsic(*F.getParent(), IsV5OrAbove); in run() local
385 if (!BasePtr) // ImplicitArgPtr/DispatchPtr not used. in run()
390 if (CI->getCalledFunction() == BasePtr) in run()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | MVEGatherScatterLowering.cpp | 140 Instruction *tryCreateIncrementingWBGatScat(IntrinsicInst *I, Value *BasePtr,
246 Value *BasePtr = Builder.CreateIntToPtr(Zero, Builder.getPtrTy()); in decomposePtr() local
250 return BasePtr; in decomposePtr()
549 Value *BasePtr = decomposePtr( in tryCreateMaskedGatherOffset() local
551 if (!BasePtr) in tryCreateMaskedGatherOffset()
560 {ResultTy, BasePtr->getType(), Offsets->getType(), Mask->getType()}, in tryCreateMaskedGatherOffset()
561 {BasePtr, Offsets, Builder.getInt32(MemoryTy->getScalarSizeInBits()), in tryCreateMaskedGatherOffset()
566 {ResultTy, BasePtr->getType(), Offsets->getType()}, in tryCreateMaskedGatherOffset()
567 {BasePtr, Offsets, Builder.getInt32(MemoryTy->getScalarSizeInBits()), in tryCreateMaskedGatherOffset()
702 Value *BasePtr = decomposePtr( in tryCreateMaskedScatterOffset() local
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| H A D | ARMBaseRegisterInfo.h | 57 unsigned BasePtr = ARM::R6;
131 Register getBaseRegister() const { return BasePtr; } in getBaseRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 302 Register BasePtr; in eliminateFrameIndex() local
304 (TFI->getFrameIndexReference(MF, FrameIndex, BasePtr).getFixed() + in eliminateFrameIndex()
309 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false); in eliminateFrameIndex()
316 Ops, TFI->getFrameIndexReference(MF, FrameIndex, BasePtr).getFixed()); in eliminateFrameIndex()
333 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
356 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
364 .addReg(BasePtr).addImm(HighOffset).addReg(0); in eliminateFrameIndex()
370 .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg); in eliminateFrameIndex()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ShadowStackGCLowering.cpp | 80 Type *Ty, Value *BasePtr, int Idx1,
83 Type *Ty, Value *BasePtr, int Idx1, int Idx2,
303 Type *Ty, Value *BasePtr, int Idx, in CreateGEP() argument
308 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP()
318 Value *BasePtr, int Idx, in CreateGEP() argument
322 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP()
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| H A D | InterleavedLoadCombinePass.cpp | 870 Value *BasePtr; in computeFromLI() local
883 computePolynomialFromPointer(*LI->getPointerOperand(), Offset, BasePtr, DL); in computeFromLI()
886 Result.PV = BasePtr; in computeFromLI()
960 Value *&BasePtr, in computePolynomialFromPointer()
966 BasePtr = nullptr; in computePolynomialFromPointer()
977 computePolynomialFromPointer(*CI.getOperand(0), Result, BasePtr, DL); in computePolynomialFromPointer()
980 BasePtr = &Ptr; in computePolynomialFromPointer()
994 BasePtr = GEP.getPointerOperand(); in computePolynomialFromPointer()
1012 BasePtr = nullptr; in computePolynomialFromPointer()
1029 BasePtr = GEP.getPointerOperand(); in computePolynomialFromPointer()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430RegisterInfo.cpp | 112 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::R4 : MSP430::SP); in eliminateFrameIndex() local
133 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
153 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCLoopInstrFormPrep.cpp | 347 static bool IsPtrInBounds(Value *BasePtr) { in IsPtrInBounds() argument
348 Value *StrippedBasePtr = BasePtr; in IsPtrInBounds()
649 Value *BasePtr = getPointerOperandAndType(BaseMemI); in rewriteForBase() local
650 assert(BasePtr && "No pointer operand"); in rewriteForBase()
655 BasePtr->getType()->getPointerAddressSpace()); in rewriteForBase()
723 cast<GetElementPtrInst>(PtrInc)->setIsInBounds(IsPtrInBounds(BasePtr)); in rewriteForBase()
730 if (PtrInc->getType() != BasePtr->getType()) in rewriteForBase()
732 new BitCastInst(PtrInc, BasePtr->getType(), in rewriteForBase()
750 cast<GetElementPtrInst>(PtrInc)->setIsInBounds(IsPtrInBounds(BasePtr)); in rewriteForBase()
755 if (NewPHI->getType() != BasePtr->getType()) in rewriteForBase()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 335 SDValue BasePtr = ST->getBasePtr(); in select() local
338 if (isa<FrameIndexSDNode>(BasePtr) || isa<ConstantSDNode>(BasePtr) || in select()
339 BasePtr.isUndef()) { in select()
343 const RegisterSDNode *RN = dyn_cast<RegisterSDNode>(BasePtr.getOperand(0)); in select()
349 int CST = (int)BasePtr.getConstantOperandVal(1); in select()
354 SDValue Ops[] = {BasePtr.getOperand(0), Offset, ST->getValue(), Chain}; in select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILLegalizePass.cpp | 218 Value *BasePtr = GEP->getPointerOperand(); in fixI8UseChain() local
219 if (ReplacedValues.count(BasePtr)) in fixI8UseChain()
220 BasePtr = ReplacedValues[BasePtr]; in fixI8UseChain()
222 Type *ElementType = BasePtr->getType(); in fixI8UseChain()
224 if (auto *AI = dyn_cast<AllocaInst>(BasePtr)) in fixI8UseChain()
226 if (auto *GV = dyn_cast<GlobalVariable>(BasePtr)) in fixI8UseChain()
246 GEPType, BasePtr, {Builder.getInt32(0), Builder.getInt32(Index)}, in fixI8UseChain()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64StackTagging.cpp | 104 Value *BasePtr; member in __anon5c1a1a7e0111::InitializerBuilder
120 InitializerBuilder(uint64_t Size, const DataLayout *DL, Value *BasePtr, in InitializerBuilder() argument
123 : Size(Size), DL(DL), BasePtr(BasePtr), SetTagFn(SetTagFn), in InitializerBuilder()
256 Value *Ptr = BasePtr; in emitZeroes()
266 Value *Ptr = BasePtr; in emitUndef()
275 Value *Ptr = BasePtr; in emitPair()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LoadStoreOpt.h | 101 Register BasePtr;
124 BasePtr = Register(); in reset()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPISelLowering.cpp | 129 SDValue BasePtr = getMemoryPtr(Op); in lowerVVP_LOAD_STORE() local
156 {Chain, BasePtr, StrideV, Mask, AVL}); in lowerVVP_LOAD_STORE()
179 {Chain, Data, BasePtr, StrideV, Mask, AVL}); in splitPackedLoadStore()
278 SDValue BasePtr = getMemoryPtr(Op); in lowerVVP_GATHER_SCATTER()
298 CDAG.getGatherScatterAddress(BasePtr, Scale, Index, Mask, AVL); in lowerVVP_GATHER_SCATTER()
272 SDValue BasePtr = getMemoryPtr(Op); lowerVVP_GATHER_SCATTER() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LoadStoreOpt.cpp | 192 Register BasePtr; in instMayAlias() member
227 if (MUC0.BasePtr.isValid() && MUC0.BasePtr == MUC1.BasePtr && in instMayAlias()
534 C.BasePtr = StoreBase; in addStoreToCandidate()
563 if (C.BasePtr != StoreBase) in addStoreToCandidate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 294 Register BasePtr = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
295 FI->setBasePointerVreg(BasePtr); in emitPrologue()
296 BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::COPY), BasePtr) in emitPrologue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 388 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD() local
394 if (DAG.isBaseWithConstantOffset(BasePtr) && in LowerLOAD()
395 isWordAligned(BasePtr->getOperand(0), DAG)) { in LowerLOAD()
396 SDValue NewBasePtr = BasePtr->getOperand(0); in LowerLOAD()
397 Offset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue(); in LowerLOAD()
401 if (TLI.isGAPlusOffset(BasePtr.getNode(), GV, Offset) && in LowerLOAD()
404 BasePtr->getValueType(0)); in LowerLOAD()
411 SDValue Low = DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain, BasePtr, in LowerLOAD()
414 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in LowerLOAD()
435 Entry.Node = BasePtr; in LowerLOAD()
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