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Searched refs:BaseOps (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInsertHardClauses.cpp175 SmallVector<const MachineOperand *, 4> BaseOps; member
218 SmallVector<const MachineOperand *, 4> BaseOps; in run() local
220 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in run()
239 !SII->shouldClusterMemOps(CI.BaseOps, 0, false, BaseOps, 0, false, in run()
256 CI.BaseOps = std::move(BaseOps); in run()
261 CI = ClauseInfo{Type, &MI, &MI, 1, 0, std::move(BaseOps)}; in run()
H A DSIInstrInfo.cpp363 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
384 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
423 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
444 BaseOps.push_back(RSrc); in getMemOperandsWithOffsetWidth()
447 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
455 BaseOps.push_back(SOffset); in getMemOperandsWithOffsetWidth()
473 BaseOps.push_back(&LdSt.getOperand(SRsrcIdx)); in getMemOperandsWithOffsetWidth()
478 BaseOps.push_back(&LdSt.getOperand(I)); in getMemOperandsWithOffsetWidth()
480 BaseOps.push_back(getNamedOperand(LdSt, AMDGPU::OpName::vaddr)); in getMemOperandsWithOffsetWidth()
495 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
[all …]
H A DSIInstrInfo.h253 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineScheduler.cpp1989 SmallVector<const MachineOperand *, 4> BaseOps; member
1994 MemOpInfo(SUnit *SU, ArrayRef<const MachineOperand *> BaseOps, in MemOpInfo()
1996 : SU(SU), BaseOps(BaseOps), Offset(Offset), Width(Width), in MemOpInfo()
2021 if (std::lexicographical_compare(BaseOps.begin(), BaseOps.end(), in operator <()
2022 RHS.BaseOps.begin(), RHS.BaseOps.end(), in operator <()
2025 if (std::lexicographical_compare(RHS.BaseOps.begin(), RHS.BaseOps.end(), in operator <()
2026 BaseOps.begin(), BaseOps.end(), Compare)) in operator <()
2138 if (!TII->shouldClusterMemOps(MemOpa.BaseOps, MemOpa.Offset, in clusterNeighboringMemOps()
2139 MemOpa.OffsetIsScalable, MemOpb.BaseOps, in clusterNeighboringMemOps()
2219 SmallVector<const MachineOperand *, 4> BaseOps; in collectMemOpRecords() local
[all …]
H A DTargetInstrInfo.cpp1738 SmallVector<const MachineOperand *, 4> BaseOps; in getMemOperandWithOffset() local
1740 if (!getMemOperandsWithOffsetWidth(MI, BaseOps, Offset, OffsetIsScalable, in getMemOperandWithOffset()
1742 BaseOps.size() != 1) in getMemOperandWithOffset()
1744 BaseOp = BaseOps.front(); in getMemOperandWithOffset()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.h74 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
H A DLanaiInstrInfo.cpp797 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
816 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.h174 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps,
H A DRISCVInstrInfo.cpp3156 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
3195 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h210 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
H A DHexagonInstrInfo.cpp3077 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
3084 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.h447 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
H A DX86InstrInfo.cpp4680 const MachineInstr &MemOp, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
4719 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h679 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
H A DPPCInstrInfo.cpp2861 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
2868 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h303 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps,
H A DAArch64InstrInfo.cpp2980 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
2994 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1550 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp3755 SmallVector<SDValue, 1> BaseOps(1, Cond); in visitSelect() local
3844 BaseOps.clear(); in visitSelect()
3850 BaseOps.clear(); in visitSelect()
3865 SmallVector<SDValue, 3> Ops(BaseOps.begin(), BaseOps.end()); in visitSelect()