/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInsertHardClauses.cpp | 174 SmallVector<const MachineOperand *, 4> BaseOps; member 212 SmallVector<const MachineOperand *, 4> BaseOps; in runOnMachineFunction() local 214 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in runOnMachineFunction() 233 !SII->shouldClusterMemOps(CI.BaseOps, 0, false, BaseOps, 0, false, in runOnMachineFunction() 250 CI.BaseOps = std::move(BaseOps); in runOnMachineFunction() 255 CI = ClauseInfo{Type, &MI, &MI, 1, 0, std::move(BaseOps)}; in runOnMachineFunction()
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H A D | SIInstrInfo.cpp | 357 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument 378 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth() 414 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth() 434 BaseOps.push_back(RSrc); in getMemOperandsWithOffsetWidth() 437 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth() 445 BaseOps.push_back(SOffset); in getMemOperandsWithOffsetWidth() 463 BaseOps.push_back(&LdSt.getOperand(SRsrcIdx)); in getMemOperandsWithOffsetWidth() 468 BaseOps.push_back(&LdSt.getOperand(I)); in getMemOperandsWithOffsetWidth() 470 BaseOps.push_back(getNamedOperand(LdSt, AMDGPU::OpName::vaddr)); in getMemOperandsWithOffsetWidth() 485 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth() [all …]
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H A D | SIInstrInfo.h | 242 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MachineScheduler.cpp | 1738 SmallVector<const MachineOperand *, 4> BaseOps; member 1743 MemOpInfo(SUnit *SU, ArrayRef<const MachineOperand *> BaseOps, in MemOpInfo() 1745 : SU(SU), BaseOps(BaseOps.begin(), BaseOps.end()), Offset(Offset), in MemOpInfo() 1770 if (std::lexicographical_compare(BaseOps.begin(), BaseOps.end(), in operator <() 1771 RHS.BaseOps.begin(), RHS.BaseOps.end(), in operator <() 1774 if (std::lexicographical_compare(RHS.BaseOps.begin(), RHS.BaseOps.end(), in operator <() 1775 BaseOps.begin(), BaseOps.end(), Compare)) in operator <() 1885 if (!TII->shouldClusterMemOps(MemOpa.BaseOps, MemOpa.Offset, in clusterNeighboringMemOps() 1886 MemOpa.OffsetIsScalable, MemOpb.BaseOps, in clusterNeighboringMemOps() 1949 SmallVector<const MachineOperand *, 4> BaseOps; in collectMemOpRecords() local [all …]
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H A D | TargetInstrInfo.cpp | 1427 SmallVector<const MachineOperand *, 4> BaseOps; in getMemOperandWithOffset() local 1429 if (!getMemOperandsWithOffsetWidth(MI, BaseOps, Offset, OffsetIsScalable, in getMemOperandWithOffset() 1431 BaseOps.size() != 1) in getMemOperandWithOffset() 1433 BaseOp = BaseOps.front(); in getMemOperandWithOffset()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiInstrInfo.h | 72 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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H A D | LanaiInstrInfo.cpp | 796 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument 815 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfo.h | 170 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps,
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H A D | RISCVInstrInfo.cpp | 2611 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument 2644 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.h | 210 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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H A D | HexagonInstrInfo.cpp | 3073 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument 3080 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.h | 399 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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H A D | X86InstrInfo.cpp | 4615 const MachineInstr &MemOp, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument 4654 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.h | 569 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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H A D | PPCInstrInfo.cpp | 2838 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument 2845 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.h | 300 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps,
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H A D | AArch64InstrInfo.cpp | 2700 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument 2714 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetInstrInfo.h | 1484 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 3699 SmallVector<SDValue, 1> BaseOps(1, Cond); in visitSelect() local 3788 BaseOps.clear(); in visitSelect() 3794 BaseOps.clear(); in visitSelect() 3809 SmallVector<SDValue, 3> Ops(BaseOps.begin(), BaseOps.end()); in visitSelect()
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