Lines Matching refs:BaseOps
357 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
378 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
414 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
434 BaseOps.push_back(RSrc); in getMemOperandsWithOffsetWidth()
437 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
445 BaseOps.push_back(SOffset); in getMemOperandsWithOffsetWidth()
463 BaseOps.push_back(&LdSt.getOperand(SRsrcIdx)); in getMemOperandsWithOffsetWidth()
468 BaseOps.push_back(&LdSt.getOperand(I)); in getMemOperandsWithOffsetWidth()
470 BaseOps.push_back(getNamedOperand(LdSt, AMDGPU::OpName::vaddr)); in getMemOperandsWithOffsetWidth()
485 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
500 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
503 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()