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Searched refs:Barrier (Results 1 – 25 of 35) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveRangeShrink.cpp158 unsigned Barrier = 0; in runOnMachineFunction() local
169 if (It != UseMap.end() && Barrier < It->second.first) in runOnMachineFunction()
170 std::tie(Barrier, BarrierMI) = It->second; in runOnMachineFunction()
230 for (MachineInstr *I = Insert; I && IOM[I] == Barrier; in runOnMachineFunction()
237 if (DefMO && Insert && NumEligibleUse > 1 && Barrier <= IOM[Insert]) { in runOnMachineFunction()
H A DMachinePipeliner.cpp282 Barrier = 0, ///< A barrier event instruction. enumerator
1091 return InstrTag::Barrier; in getInstrTag()
1139 case InstrTag::Barrier: in computeDependenciesAux()
1221 I.addPred(SDep(SU, SDep::Barrier)); in updatePhiDependences()
1243 I.addPred(SDep(SU, SDep::Barrier)); in updatePhiDependences()
4222 SDep Base(Src, SDep::Barrier); in SwingSchedulerDDG()
4278 SDep Dep(Src, SDep::Barrier); in modifySUnits()
H A DScheduleDAG.cpp95 case Barrier: dbgs() << " Barrier"; break; in dump()
/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
H A Dtsan_interceptors_mac.cpp81 m(int32_t, int32_t, a32, f##32##Barrier, \
85 m(int64_t, int64_t, a64, f##64##Barrier, \
91 m(int32_t, uint32_t, a32, f##32##Barrier, \
122 TSAN_INTERCEPTOR(bool, f##Barrier, t old_value, t new_value, \
124 SCOPED_TSAN_INTERCEPTOR(f##Barrier, old_value, new_value, ptr); \
155 OSATOMIC_INTERCEPTOR_BITOP(f##Barrier, op, clear, kMacOrderBarrier)
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUExportClustering.cpp75 DAG->addEdge(SUb, SDep(SUa, SDep::Barrier)); in buildCluster()
96 ToAdd.push_back(SDep(ExportPredSU, SDep::Barrier)); in removeExportDependencies()
H A DAMDGPULowerModuleLDSPass.cpp980 unsigned BarrierScope = llvm::AMDGPU::Barrier::BARRIER_SCOPE_WORKGROUP; in lowerSpecialLDSVariables()
1023 unsigned BarrierScope = llvm::AMDGPU::Barrier::BARRIER_SCOPE_WORKGROUP; in lowerSpecialLDSVariables()
H A DSIDefines.h1058 namespace Barrier {
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h158 Barrier, enumerator
294 bool isBarrier() const { return Flags & (1ULL << MCID::Barrier); } in isBarrier()
/freebsd/contrib/llvm-project/openmp/runtime/src/
H A Dkmp_itt.inl409 does not have barrier object or barrier data structure. Barrier is just a
455 char const *type = "OMP Barrier";
472 type = "OMP For Barrier";
475 type = "OMP Sections Barrier";
478 type = "OMP Single Barrier";
481 type = "OMP Workshare Barrier";
484 type = "OMP Implicit Barrier";
489 type = "OMP Explicit Barrier";
506 type = "OMP Join Barrier";
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGRecordLayoutBuilder.cpp537 bool Barrier = false; in accumulateBitFields() local
563 Barrier = true; in accumulateBitFields()
572 Barrier = true; in accumulateBitFields()
663 if (Barrier) in accumulateBitFields()
710 assert(!Barrier && "Accumulating across barrier"); in accumulateBitFields()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h71 Barrier, ///< An unknown scheduling barrier. enumerator
175 return getKind() == Order && Contents.OrdKind == Barrier; in isBarrier()
407 SDep Dep(SU, SDep::Barrier); in addPredBarrier()
H A DMachineInstr.h964 return hasProperty(MCID::Barrier, Type);
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp328 DAG->addEdge(&DAG->SUnits[su], SDep(LastSequentialCall, SDep::Barrier)); in apply()
332 DAG->addEdge(&DAG->SUnits[su], SDep(&DAG->SUnits[su-1], SDep::Barrier)); in apply()
368 SDep(It->second, SDep::Barrier)); in apply()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVBuiltins.td43 def Barrier : BuiltinGroup;
636 // Barrier builtin records:
637 defm : DemangledNativeBuiltin<"barrier", OpenCL_std, Barrier, 1, 3, OpControlBarrier>;
638 defm : DemangledNativeBuiltin<"work_group_barrier", OpenCL_std, Barrier, 1, 3, OpControlBarrier>;
639 defm : DemangledNativeBuiltin<"__spirv_ControlBarrier", OpenCL_std, Barrier, 3, 3, OpControlBarrier…
646 defm : DemangledNativeBuiltin<"intel_work_group_barrier_arrive", OpenCL_std, Barrier, 1, 2, OpContr…
647 defm : DemangledNativeBuiltin<"__spirv_ControlBarrierArriveINTEL", OpenCL_std, Barrier, 3, 3, OpCon…
648 defm : DemangledNativeBuiltin<"intel_work_group_barrier_wait", OpenCL_std, Barrier, 1, 2, OpControl…
649 defm : DemangledNativeBuiltin<"__spirv_ControlBarrierWaitINTEL", OpenCL_std, Barrier, 3, 3, OpContr…
H A DSPIRVBuiltins.cpp2784 case SPIRV::Barrier: in mapBuiltinToOpcode()
2881 case SPIRV::Barrier: in lowerBuiltin()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/
H A DOpenMPOpt.cpp4087 CallInst *Barrier = in insertInstructionGuardsHelper() local
4089 Barrier->setDebugLoc(DL); in insertInstructionGuardsHelper()
4090 OMPInfoCache.setCallingConvention(BarrierFn, Barrier); in insertInstructionGuardsHelper()
4094 CallInst *Barrier = in insertInstructionGuardsHelper() local
4097 Barrier->setDebugLoc(DL); in insertInstructionGuardsHelper()
4098 OMPInfoCache.setCallingConvention(BarrierFn, Barrier); in insertInstructionGuardsHelper()
4510 CallInst *Barrier = in buildCustomStateMachine() local
4512 OMPInfoCache.setCallingConvention(BarrierFn, Barrier); in buildCustomStateMachine()
4513 Barrier->setDebugLoc(DLoc); in buildCustomStateMachine()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp521 struct BarrierOp Barrier; member
563 Barrier = o.Barrier; in AArch64Operand()
664 return Barrier.Val; in getBarrier()
669 return StringRef(Barrier.Data, Barrier.Length); in getBarrierName()
674 return Barrier.HasnXSModifier; in getBarriernXSModifier()
2465 Op->Barrier.Val = Val; in CreateBarrier()
2466 Op->Barrier.Data = Str.data(); in CreateBarrier()
2467 Op->Barrier.Length = Str.size(); in CreateBarrier()
2468 Op->Barrier.HasnXSModifier = HasnXSModifier; in CreateBarrier()
2516 Op->Barrier.Data = Str.data(); in CreatePrefetch()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp320 SDep D(LoadSU, SDep::Barrier); in CopyAndMoveSuccessors()
H A DScheduleDAGSDNodes.cpp510 SDep Dep = isChain ? SDep(OpSU, SDep::Barrier) in AddSchedEdges()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsInstrInfo.td1078 def SSNOP_MM : MMRel, Barrier<"ssnop", II_SSNOP>, BARRIER_FM_MM<0x1>,
1080 def EHB_MM : MMRel, Barrier<"ehb", II_EHB>, BARRIER_FM_MM<0x3>,
1082 def PAUSE_MM : MMRel, Barrier<"pause", II_PAUSE>, BARRIER_FM_MM<0x5>,
H A DMicroMips32r6InstrInfo.td451 class EHB_MMR6_DESC : Barrier<"ehb", II_EHB>;
591 class PAUSE_MMR6_DESC : Barrier<"pause", II_PAUSE>;
605 class SSNOP_MMR6_DESC : Barrier<"ssnop", II_SSNOP>;
H A DMipsInstrInfo.td2453 class Barrier<string asmstr, InstrItinClass itin = NoItinerary> :
2456 def SSNOP : MMRel, StdMMR6Rel, Barrier<"ssnop", II_SSNOP>, BARRIER_FM<1>,
2458 def EHB : MMRel, Barrier<"ehb", II_EHB>, BARRIER_FM<3>, ISA_MIPS1;
2461 def PAUSE : MMRel, StdMMR6Rel, Barrier<"pause", II_PAUSE>, BARRIER_FM<5>,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedCyclone.td290 // 7.8.14. Never-issued Instructions, Barrier and Hint Operations
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFeatures.td517 "Enable v8.5a Speculation Barrier" >;
/freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/
H A DDXIL.td903 def Barrier : DXILOp<80, barrier> {

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