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Searched refs:Bank (Results 1 – 25 of 47) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterBankEmitter.cpp139 for (const auto &Bank : Banks) in emitHeader() local
140 OS << " " << Bank.getEnumeratorName() << " = " << ID++ << ",\n"; in emitHeader()
223 for (const auto &Bank : Banks) { in emitBaseClassImplementation() local
227 for (const auto &RC : Bank.register_classes()) in emitBaseClassImplementation()
230 OS << "const uint32_t " << Bank.getCoverageArrayName() << "[] = {\n"; in emitBaseClassImplementation()
246 for (const auto &Bank : Banks) { in emitBaseClassImplementation() local
248 (TargetName + "::" + Bank.getEnumeratorName()).str(); in emitBaseClassImplementation()
249 OS << "constexpr RegisterBank " << Bank.getInstanceVarName() << "(/* ID */ " in emitBaseClassImplementation()
250 << QualifiedBankID << ", /* Name */ \"" << Bank.getName() << "\", " in emitBaseClassImplementation()
251 << "/* CoveredRegClasses */ " << Bank.getCoverageArrayName() in emitBaseClassImplementation()
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H A DRegisterInfoEmitter.cpp69 void runEnums(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
72 void runMCDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
76 CodeGenRegBank &Bank);
80 CodeGenRegBank &Bank);
105 CodeGenRegBank &Bank) { in runEnums() argument
106 const auto &Registers = Bank.getRegisters(); in runEnums()
137 const auto &RegisterClasses = Bank.getRegClasses(); in runEnums()
172 auto &SubRegIndices = Bank.getSubRegIndices(); in runEnums()
191 unsigned NumSets = Bank.getNumRegPressureSets(); in runEnums()
193 const RegUnitSet &RegUnits = Bank.getRegSetAt(i); in runEnums()
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxl-s905x-khadas-vim.dts170 gpio-line-names = /* Bank GPIOZ */
175 /* Bank GPIOH */
183 /* Bank BOOT */
188 /* Bank CARD */
191 /* Bank GPIODV */
196 /* Bank GPIOX */
206 /* Bank GPIOCLK */
H A Dmeson-gxl-s805x-libretech-ac.dts236 gpio-line-names = /* Bank GPIOZ */
240 /* Bank GPIOH */
248 /* Bank BOOT */
254 /* Bank CARD */
256 /* Bank GPIODV */
262 /* Bank GPIOX */
271 /* Bank GPIOCLK */
H A Dmeson-gxl-s905x-libretech-cc.dts259 gpio-line-names = /* Bank GPIOZ */
263 /* Bank GPIOH */
271 /* Bank BOOT */
276 /* Bank CARD */
279 /* Bank GPIODV */
285 /* Bank GPIOX */
296 /* Bank GPIOCLK */
H A Dmeson-gxbb-odroidc2.dts293 gpio-line-names = /* Bank GPIOZ */
299 /* Bank GPIOH */
301 /* Bank BOOT */
306 /* Bank CARD */
309 /* Bank GPIODV */
314 /* Bank GPIOY */
319 /* Bank GPIOX */
329 /* Bank GPIOCLK */
H A Dmeson-gxbb-nanopi-k2.dts250 gpio-line-names = /* Bank GPIOZ */
256 /* Bank GPIOH */
259 /* Bank BOOT */
265 /* Bank CARD */
268 /* Bank GPIODV */
273 /* Bank GPIOY */
283 /* Bank GPIOX */
293 /* Bank GPIOCLK */
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterBankInfo.cpp352 const RegisterBank *Bank = in setTypesAccordingToPhysicalRegister() local
355 if (Bank == &Mips::FPRBRegBank) in setTypesAccordingToPhysicalRegister()
357 else if (Bank == &Mips::GPRBRegBank) in setTypesAccordingToPhysicalRegister()
530 const RegisterBankInfo::ValueMapping *Bank = getFprbMapping(Op0Size); in getInstrMapping() local
532 {Bank, &Mips::ValueMappings[Mips::GPRIdx], Bank, Bank}); in getInstrMapping()
539 const RegisterBankInfo::ValueMapping *Bank = in getInstrMapping() local
542 {Bank, &Mips::ValueMappings[Mips::GPRIdx], Bank, Bank}); in getInstrMapping()
/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson8b-odroidc1.dts233 gpio-line-names = /* Bank GPIOX */
243 /* Bank GPIOY */
248 /* Bank GPIODV */
252 /* Bank GPIOH */
257 /* Bank CARD */
261 /* Bank BOOT */
269 /* Bank DIF */
H A Dmeson8b-ec100.dts399 gpio-line-names = /* Bank GPIOX */
406 /* Bank GPIOY */
409 /* Bank GPIODV */
413 /* Bank GPIOH */
418 /* Bank CARD */
422 /* Bank BOOT */
431 /* Bank DIF */
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dbrcm,bcm2835-armctrl-ic.txt34 Bank 0:
44 Bank 1:
78 Bank 2:
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp221 static bool isVectorRegisterBank(const RegisterBank &Bank) { in isVectorRegisterBank() argument
222 unsigned BankID = Bank.getID(); in isVectorRegisterBank()
668 const RegisterBank *Bank = getRegBank(Reg, *MRI, *TRI); in split64BitValueForMapping() local
669 MRI->setRegBank(LoLHS, *Bank); in split64BitValueForMapping()
670 MRI->setRegBank(HiLHS, *Bank); in split64BitValueForMapping()
707 const RegisterBank *Bank = getRegBank(Src, MRI, *TRI); in buildReadFirstLane() local
709 if (Bank == &AMDGPU::SGPRRegBank) in buildReadFirstLane()
715 if (Bank != &AMDGPU::VGPRRegBank) { in buildReadFirstLane()
1019 const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI); in constrainOpWithReadfirstlane() local
1020 if (Bank == &AMDGPU::SGPRRegBank) in constrainOpWithReadfirstlane()
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H A DSIRegisterInfo.h334 getRegClassForSizeOnBank(unsigned Size, const RegisterBank &Bank) const;
337 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &Bank) const {
338 return getRegClassForSizeOnBank(Ty.getSizeInBits(), Bank);
331 getRegClassForTypeOnBank(LLT Ty,const RegisterBank & Bank) getRegClassForTypeOnBank() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp42 unsigned selectIndexedProgMemLoad(const LoadSDNode *LD, MVT VT, int Bank);
190 int Bank) { in selectIndexedProgMemLoad() argument
197 assert((Bank == 0 || Subtarget->hasELPM()) && in selectIndexedProgMemLoad()
203 if (VT.SimpleTy == MVT::i8 && Offs == 1 && Bank == 0) in selectIndexedProgMemLoad()
/freebsd/sys/dev/acpica/
H A Dacpi_apei.c104 uint16_t Bank; member
204 printf(" Bank: %u\n", p->Bank); in apei_mem_handler()
231 printf(" Bank Group: %u\n", p->Bank >> 8); in apei_mem_handler()
233 printf(" Bank Address: %u\n", p->Bank & 0xff); in apei_mem_handler()
/freebsd/contrib/file/magic/Magdir/
H A Dscientific108 # PDB: Protein Data Bank files
130 >>>>&0 regex/1l [A-Z0-9]{4} Protein Data Bank data, ID Code %s
H A Dsysex42 >>4 byte 0x00 Bank
78 >>3 byte 0x01 Dump (Bank)
/freebsd/sys/contrib/device-tree/Bindings/misc/
H A Dqcom,fastrpc.txt53 Definition: Context Bank ID.
/freebsd/sys/dts/
H A Dbindings-localbus.txt38 localbus node. Bank is most often interpreted as device chip
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam437x-sk-evm.dts100 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
107 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
114 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
121 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dqca,qca7000.txt49 interrupt-parent = <&gpio3>; /* GPIO Bank 3 */
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dnuvoton,npcm7xx-pinctrl.txt15 === GPIO Bank Subnode ===
19 Required GPIO Bank subnode-properties:
H A Datmel,at91-pinctrl.txt34 Bank: 3 (A, B and C)
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am642-sr-som.dtsi99 * - Bank 1 @ 0x080000000-0x0FFFFFFFF: max. 2GB in 32-bit address space
100 * - Bank 2 @ 0x880000000-0x9FFFFFFFF: max. 6GB in 64-bit address space
/freebsd/contrib/tzdata/
H A Dasia3144 # known as the Gaza Strip and the West Bank, was under British rule.
3153 # annexed in 1950 as the West Bank (and the word "Trans" was dropped from
3166 # towns in the West Bank and Gaza by 1995. I know that in order to
3187 # We don't yet need a separate entry for the West Bank, since
3191 # for parts of the West Bank as they transitioned from Israel's rules
3226 # the West Bank.
3242 # My understanding is that Gaza and the West Bank disagree even over when
3252 # the West Bank will end Daylight Saving Time at midnight Sunday (Aug 31, 2008).
3286 # Seems that Gaza Strip will go back to Winter Time same date as West Bank.
3288 # According to Palestinian Ministry Of Interior, West Bank an
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