| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZLongBranch.cpp | 362 for (unsigned BTI = 0, BTE = Block.NumTerminators; BTI != BTE; ++BTI) { in setWorstCaseAddresses() local
468 for (unsigned BTI = 0, BTE = Block.NumTerminators; BTI != BTE; ++BTI) { in relaxBranches() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64BranchTargets.cpp | 167 MachineInstr *BTI = BuildMI(MBB, MBBI, DL, TII->get(AArch64::HINT)) in addBTI() local
174 auto AfterBTI = std::next(MachineBasicBlock::iterator(BTI)); in addBTI()
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| H A D | AArch64FMV.td | 43 def : FMVExtension<"bti", "BTI">;
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| H A D | AArch64SystemOperands.td | 783 // BTI instruction options.
786 class BTI<string name, bits<3> encoding> {
793 let FilterClass = "BTI";
799 let FilterClass = "BTI";
811 def : BTI<"c", 0b010>;
812 def : BTI<"j", 0b100>;
813 def : BTI<"jc", 0b110>;
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| H A D | AArch64ExpandPseudoInsts.cpp | 905 MachineInstr *BTI = in expandCALL_BTI() local
915 finalizeBundle(MBB, Call->getIterator(), std::next(BTI->getIterator())); in expandCALL_BTI()
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| H A D | AArch64Features.td | 265 def FeatureBranchTargetId : ExtensionWithMArch<"bti", "BTI", "FEAT_BTI",
815 "Don't place a BTI instruction "
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| H A D | AArch64RegisterInfo.td | 266 // For BTI, x16 and x17 are the only registers which can be used to indirectly
267 // branch (not call) to the "BTI c" instruction at the start of a BTI-protected
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| H A D | AArch64Processors.td | 944 // ArmV8.5-a extensions, excluding BTI:
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| H A D | AArch64InstrInfo.td | 760 // Function call followed by a BTI instruction.
1273 // x17, because these are the only registers which can target the BTI C
1282 // BTI on, PAuthLR off: x16 or x17
1284 // BTI on, PAuthLR on: x17 only
1286 // BTI off, PAuthLR on: Any non-callee-saved register except x16
1288 // BTI off, PAuthLR off: Any non-callee-saved register
1508 // inputs that use Branch Target Identification mnemonics, even with BTI disabled.
1510 // should not emit these mnemonics unless BTI is enabled.
10244 // Indirect tail-calls with reduced register classes, needed for BTI and
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | SwitchLoweringUtils.cpp | 442 BitTestInfo BTI; in buildBitTests() local
455 BTI.push_back(BitTestCase(CB.Mask, BitTestBB, CB.BB, CB.ExtraProb)); in buildBitTests()
459 ContiguousRange, nullptr, nullptr, std::move(BTI), in buildBitTests()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 1502 auto BTI = AArch64BTIHint::lookupBTIByEncoding(btihintop); in printBTIHintOp() local
1503 if (BTI) in printBTIHintOp()
1504 O << BTI->Name; in printBTIHintOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 672 struct BTI : SysAlias { struct
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFeatures.td | 546 /// Don't place a BTI instruction after return-twice constructs (setjmp).
549 "Don't place a BTI instruction "
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | TextNodeDumper.cpp | 743 } else if (const auto BTI = B.dyn_cast<TypeInfoLValue>()) { in Visit() local
746 BTI.print(OS, PrintPolicy); in Visit()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 3272 auto BTI = AArch64BTIHint::lookupBTIByName(Tok.getString()); in tryParseBTIHint() local
3273 if (!BTI) in tryParseBTIHint()
3277 BTI->Encoding, Tok.getString(), S, getContext())); in tryParseBTIHint()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 8369 auto &BTI = getBackedgeTakenInfo(L); in getPredicatedBackedgeTakenInfo() local
8370 if (BTI.hasFullInfo()) in getPredicatedBackedgeTakenInfo()
8371 return BTI; in getPredicatedBackedgeTakenInfo()
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| /freebsd/contrib/llvm-project/clang/include/clang/Driver/ |
| H A D | Options.td | 5237 HelpText<"Add .note.gnu.property with BTI to assembly files (AArch64 only)">;
5240 HelpText<"Do not add a BTI instruction after a setjmp or other"
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