| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 64 BRCOND, enumerator
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| H A D | AVRISelLowering.cpp | 107 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in AVRTargetLowering()
249 NODE(BRCOND); in getTargetNodeName()
879 return DAG.getNode(AVRISD::BRCOND, dl, MVT::Other, Chain, Dest, TargetCC, in LowerBR_CC()
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| H A D | AVRInstrInfo.td | 51 : SDNode<"AVRISD::BRCOND", SDT_AVRBrcond, [SDNPHasChain, SDNPInGlue]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.h | 69 BRCOND, enumerator
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| H A D | M68kISelLowering.cpp | 123 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in M68kTargetLowering()
1395 case ISD::BRCOND: in LowerOperation()
1860 if (User->getOpcode() != ISD::BRCOND && User->getOpcode() != ISD::SETCC && in hasNonFlagsUse()
2529 Chain = DAG.getNode(M68kISD::BRCOND, DL, Op.getValueType(), Chain, in LowerBRCOND()
2559 Chain = DAG.getNode(M68kISD::BRCOND, DL, Op.getValueType(), Chain, in LowerBRCOND()
2603 return DAG.getNode(M68kISD::BRCOND, DL, Op.getValueType(), Chain, Dest, CC, in LowerBRCOND()
3597 return DAG.getNode(M68kISD::BRCOND, DL, N->getVTList(), N->getOperand(0), in combineM68kBrCond()
3638 case M68kISD::BRCOND: in PerformDAGCombine()
3684 case M68kISD::BRCOND: in getTargetNodeName()
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| H A D | M68kInstrInfo.td | 134 def MxBrCond : SDNode<"M68kISD::BRCOND", MxSDT_BrCond, [SDNPHasChain]>;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1111 BRCOND, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 74 BRCOND, // Conditional branch. enumerator
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| H A D | ARMISelLowering.cpp | 831 setTargetDAGCombine({ISD::BRCOND, ISD::BR_CC}); in ARMTargetLowering()
1449 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in ARMTargetLowering()
1712 MAKE_CASE(ARMISD::BRCOND) in getTargetNodeName()
5691 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
5741 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBRCOND()
5795 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBR_CC()
5803 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
5822 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5826 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
10578 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 147 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in ARCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 421 case ISD::BRCOND: return "brcond"; in getOperationName()
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| H A D | SelectionDAGBuilder.cpp | 2964 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSwitchCase()
3029 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitJumpTableHeader()
3155 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSPDescriptorParent()
3249 Root = DAG.getNode(ISD::BRCOND, dl, MVT::Other, Root, RangeCmp, in visitBitTestHeader()
3307 SDValue BrAnd = DAG.getNode(ISD::BRCOND, dl, in visitBitTestCase()
11977 DAG.getNode(ISD::BRCOND, DL, MVT::Other, getControlRoot(), Cond, in lowerWorkItem()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 70 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in BPFTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 123 BRCOND, enumerator
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| H A D | X86InstrFragments.td | 160 def X86brcond : SDNode<"X86ISD::BRCOND", SDTX86BrCond,
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| H A D | X86ISelLowering.cpp | 376 setOperationAction(ISD::BRCOND , MVT::Other, Custom); in X86TargetLowering()
22574 if (User->getOpcode() != ISD::BRCOND && User->getOpcode() != ISD::SETCC && in hasNonFlagsUse()
24829 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24836 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24862 Chain = DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, in LowerBRCOND()
24865 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24876 DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, Cmp); in LowerBRCOND()
24878 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24885 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24896 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 94 BRCOND, // Conditional branch instruction; "b.cond". enumerator
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| H A D | AArch64ISelLowering.cpp | 493 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in AArch64TargetLowering()
2553 MAKE_CASE(AArch64ISD::BRCOND) in getTargetNodeName()
6620 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
6772 case ISD::BRCOND: in LowerOperation()
9847 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBR_CC()
9914 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBR_CC()
9928 DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CC1Val, Cmp); in LowerBR_CC()
9931 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, BR1, Dest, CC2Val, in LowerBR_CC()
25350 case AArch64ISD::BRCOND: in PerformDAGCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 100 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in R600TargetLowering()
420 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
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| H A D | SIISelLowering.cpp | 295 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in SITargetLowering()
5755 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
6544 SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND, in LowerBRCOND() argument
6546 SDLoc DL(BRCOND); in LowerBRCOND()
6548 SDNode *Intr = BRCOND.getOperand(1).getNode(); in LowerBRCOND()
6549 SDValue Target = BRCOND.getOperand(2); in LowerBRCOND()
6560 BR = findUser(BRCOND, ISD::BR); in LowerBRCOND()
6568 return BRCOND; in LowerBRCOND()
6582 Ops.push_back(BRCOND.getOperand(0)); in LowerBRCOND()
6595 BRCOND.getOperand(0) in LowerBRCOND()
[all …]
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| H A D | AMDGPUISelDAGToDAG.cpp | 665 case ISD::BRCOND: in Select()
2379 assert(N->getOpcode() == ISD::BRCOND); in isCBranchSCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 87 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in LanaiTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 91 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in MSP430TargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 355 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in MipsTargetLowering()
1242 case ISD::BRCOND: return lowerBRCOND(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 154 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in initSPUActions()
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