| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1180 BRCOND, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 125 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in M68kTargetLowering()
1397 case ISD::BRCOND: in LowerOperation()
1862 if (User->getOpcode() != ISD::BRCOND && User->getOpcode() != ISD::SETCC && in hasNonFlagsUse()
2530 Chain = DAG.getNode(M68kISD::BRCOND, DL, Op.getValueType(), Chain, in LowerBRCOND()
2560 Chain = DAG.getNode(M68kISD::BRCOND, DL, Op.getValueType(), Chain, in LowerBRCOND()
2604 return DAG.getNode(M68kISD::BRCOND, DL, Op.getValueType(), Chain, Dest, CC, in LowerBRCOND()
3597 return DAG.getNode(M68kISD::BRCOND, DL, N->getVTList(), N->getOperand(0), in combineM68kBrCond()
3638 case M68kISD::BRCOND: in PerformDAGCombine()
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| H A D | M68kInstrInfo.td | 157 def MxBrCond : SDNode<"M68kISD::BRCOND", MxSDT_BrCond, [SDNPHasChain]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 75 BRCOND, // Conditional branch. enumerator
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| H A D | ARMISelLowering.cpp | 821 setTargetDAGCombine({ISD::BRCOND, ISD::BR_CC}); in ARMTargetLowering()
1406 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in ARMTargetLowering()
1706 MAKE_CASE(ARMISD::BRCOND) in getTargetNodeName()
5772 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, in OptimizeVFPBrcond()
5820 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, in LowerBRCOND()
5872 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, in LowerBR_CC()
5879 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, Cmp); in LowerBR_CC()
5895 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Ops); in LowerBR_CC()
5899 Res = DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Ops); in LowerBR_CC()
10639 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 148 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in ARCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 441 case ISD::BRCOND: return "brcond"; in getOperationName()
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| H A D | SelectionDAGBuilder.cpp | 2935 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, MVT::Other, getControlRoot(), in visitSwitchCase()
3000 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitJumpTableHeader()
3131 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSPDescriptorParent()
3274 Root = DAG.getNode(ISD::BRCOND, dl, MVT::Other, Root, RangeCmp, in visitBitTestHeader()
3331 SDValue BrAnd = DAG.getNode(ISD::BRCOND, dl, in visitBitTestCase()
12128 DAG.getNode(ISD::BRCOND, DL, MVT::Other, getControlRoot(), Cond, in lowerWorkItem()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 140 BRCOND, enumerator
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| H A D | X86InstrFragments.td | 155 def X86brcond : SDNode<"X86ISD::BRCOND", SDTX86BrCond,
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| H A D | X86ISelLowering.cpp | 382 setOperationAction(ISD::BRCOND , MVT::Other, Custom); in X86TargetLowering()
23309 if (User->getOpcode() != ISD::BRCOND && User->getOpcode() != ISD::SETCC && in hasNonFlagsUse()
25680 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
25687 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
25713 Chain = DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, in LowerBRCOND()
25716 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
25726 Chain = DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
25729 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
25736 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
25747 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 71 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in BPFTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 99 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in R600TargetLowering()
424 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
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| H A D | SIISelLowering.cpp | 302 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in SITargetLowering()
6104 case ISD::BRCOND: in LowerOperation()
6908 SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND, SelectionDAG &DAG) const { in LowerBRCOND() argument
6909 SDLoc DL(BRCOND); in LowerBRCOND()
6911 SDNode *Intr = BRCOND.getOperand(1).getNode(); in LowerBRCOND()
6912 SDValue Target = BRCOND.getOperand(2); in LowerBRCOND()
6923 BR = findUser(BRCOND, ISD::BR); in LowerBRCOND()
6931 return BRCOND; in LowerBRCOND()
6945 Ops.push_back(BRCOND.getOperand(0)); in LowerBRCOND()
6956 SDValue Ops[] = {SDValue(Result, 0), BRCOND.getOperand(0)}; in LowerBRCOND()
[all …]
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| H A D | AMDGPUISelDAGToDAG.cpp | 781 case ISD::BRCOND: in Select()
2494 assert(N->getOpcode() == ISD::BRCOND); in isCBranchSCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 106 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in AVRTargetLowering()
825 return DAG.getNode(AVRISD::BRCOND, dl, MVT::Other, Chain, Dest, TargetCC, in LowerBR_CC()
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| H A D | AVRInstrInfo.td | 63 : SDNode<"AVRISD::BRCOND", SDT_AVRBrcond, [SDNPHasChain, SDNPInGlue]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 90 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in MSP430TargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 85 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in LanaiTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 353 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in MipsTargetLowering()
1333 case ISD::BRCOND: return lowerBRCOND(Op, DAG); in LowerOperation()
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| H A D | MipsSEISelLowering.cpp | 296 setOperationAction(ISD::BRCOND, MVT::Other, Legal); in MipsSETargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 154 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in initSPUActions()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 719 def brcond : SDNode<"ISD::BRCOND" , SDTBrcond, [SDNPHasChain]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 502 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in AArch64TargetLowering()
7045 return DAG.getNode(AArch64ISD::BRCOND, DL, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
7239 case ISD::BRCOND: in LowerOperation()
10480 return DAG.getNode(AArch64ISD::BRCOND, DL, MVT::Other, Chain, Dest, CCVal, in LowerBR_CC()
10558 return DAG.getNode(AArch64ISD::BRCOND, DL, MVT::Other, Chain, Dest, CCVal, in LowerBR_CC()
10572 DAG.getNode(AArch64ISD::BRCOND, DL, MVT::Other, Chain, Dest, CC1Val, Cmp); in LowerBR_CC()
10575 return DAG.getNode(AArch64ISD::BRCOND, DL, MVT::Other, BR1, Dest, CC2Val, in LowerBR_CC()
26820 case AArch64ISD::BRCOND: in PerformDAGCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1714 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in SparcTargetLowering()
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