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Searched refs:ArgReg (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp3360 unsigned ArgReg = ArgRegs[VA.getValNo()]; in fastLowerCall() local
3372 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3373 ArgVT, ArgReg); in fastLowerCall()
3385 ArgReg = fastEmitZExtFromI1(MVT::i8, ArgReg); in fastLowerCall()
3388 if (ArgReg == 0) in fastLowerCall()
3392 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3393 ArgVT, ArgReg); in fastLowerCall()
3401 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3402 ArgVT, ArgReg); in fastLowerCall()
3404 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1193 Register ArgReg = getRegForValue(ArgVal); in processCallArgs() local
1194 if (!ArgReg) in processCallArgs()
1205 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
1206 if (!ArgReg) in processCallArgs()
1213 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
1214 if (!ArgReg) in processCallArgs()
1225 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
H A DMipsISelLowering.cpp3706 Register ArgReg = VA.getLocReg(); in LowerFormalArguments() local
3711 unsigned Reg = addLiveIn(DAG.getMachineFunction(), ArgReg, RC); in LowerFormalArguments()
4405 unsigned ArgReg = ByValArgRegs[FirstReg + I]; in copyByValRegs() local
4406 unsigned VReg = addLiveIn(MF, ArgReg, RC); in copyByValRegs()
4445 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg() local
4446 RegsToPass.push_back(std::make_pair(ArgReg, LoadVal)); in passByValArg()
4494 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg() local
4495 RegsToPass.push_back(std::make_pair(ArgReg, Val)); in passByValArg()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp836 Register ArgReg = Args[i].Regs[Part]; in handleAssignments() local
871 ArgReg = PointerToStackReg; in handleAssignments()
895 Handler.assignValueToAddress(ArgReg, StackAddr, PointerTy, MPO, VA); in handleAssignments()
940 Handler.assignValueToReg(ArgReg, ThisReturnRegs[Part], VA); in handleAssignments()
942 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA); in handleAssignments()
945 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA); in handleAssignments()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMIRYamlMapping.h490 static void mapping(IO &YamlIO, CallSiteInfo::ArgRegPair &ArgReg) {
491 YamlIO.mapRequired("arg", ArgReg.ArgNo);
492 YamlIO.mapRequired("reg", ArgReg.Reg);
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMIRPrinter.cpp546 for (auto ArgReg : CSInfo.second.ArgRegPairs) { in convertCallSiteObjects() local
548 YmlArgReg.ArgNo = ArgReg.ArgNo; in convertCallSiteObjects()
549 printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI); in convertCallSiteObjects()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp1174 for (std::pair<MCRegister, Register> ArgReg : ImplicitArgRegs) { in handleImplicitCallArguments()
1175 MIRBuilder.buildCopy((Register)ArgReg.first, ArgReg.second); in handleImplicitCallArguments()
1176 CallInst.addReg(ArgReg.first, RegState::Implicit); in handleImplicitCallArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVBuiltins.cpp584 Register ArgReg = Call->Arguments[i]; local
585 if (!MRI->getRegClassOrNull(ArgReg))
586 MRI->setRegClass(ArgReg, &SPIRV::IDRegClass);
587 MIB.addUse(ArgReg);
1084 Register ArgReg = Call->Arguments[i]; in generateGroupInst() local
1085 if (!MRI->getRegClassOrNull(ArgReg)) in generateGroupInst()
1086 MRI->setRegClass(ArgReg, &SPIRV::IDRegClass); in generateGroupInst()
1087 MIB.addUse(ArgReg); in generateGroupInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp1122 for (unsigned ArgReg : {ARM::R0, ARM::R1, ARM::R2, ARM::R3}) in spillCalleeSavedRegisters()
1123 if (!MF.getRegInfo().isLiveIn(ArgReg)) in spillCalleeSavedRegisters()
1124 CopyRegs.insert(ArgReg); in spillCalleeSavedRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1469 unsigned ArgReg; in processCallArgs() local
1471 ArgReg = NextFPR++; in processCallArgs()
1475 ArgReg = NextGPR++; in processCallArgs()
1478 TII.get(TargetOpcode::COPY), ArgReg).addReg(Arg); in processCallArgs()
1479 RegArgs.push_back(ArgReg); in processCallArgs()
H A DPPCISelLowering.cpp7353 const MCPhysReg ArgReg = VA.getLocReg(); in LowerFormalArguments_AIX() local
7358 StackSize, mapArgRegToOffsetAIX(ArgReg, FL), /* IsImmutable */ false, in LowerFormalArguments_AIX()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3035 Register ArgReg = getRegForValue(ArgVal); in processCallArgs() local
3036 if (!ArgReg) in processCallArgs()
3046 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
3047 if (!ArgReg) in processCallArgs()
3056 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
3057 if (!ArgReg) in processCallArgs()
3068 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
3097 if (!emitStore(ArgVT, ArgReg, Addr, MMO)) in processCallArgs()
H A DAArch64ISelLowering.cpp8627 [&VA](MachineFunction::ArgRegPair ArgReg) { in LowerCall() argument
8628 return ArgReg.Reg == VA.getLocReg(); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFastISel.cpp901 for (unsigned ArgReg : Args) in selectCall() local
902 MIB.addReg(ArgReg); in selectCall()
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DBugReporterVisitors.cpp3418 const MemRegion *ArgReg = Call->getArgSVal(Idx).getAsRegion(); in VisitNode() local
3422 if ( !ArgReg || !R->isSubRegionOf(ArgReg->StripCasts())) in VisitNode()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfDebug.cpp818 for (const auto &ArgReg : CSInfo->second.ArgRegPairs) { in collectCallSiteParameters() local
820 ForwardedRegWorklist.insert({ArgReg.Reg, {{ArgReg.Reg, EmptyExpr}}}) in collectCallSiteParameters()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp103 Register ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg(); in parametersInCSRMatch() local
104 if (MRI.getLiveInPhysReg(ArgReg) != Reg) in parametersInCSRMatch()