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Searched refs:ArgReg (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVCallLowering.cpp456 Register ArgReg = VRegs[i][0]; in lowerFormalArguments() local
457 MRI->setRegClass(ArgReg, GR->getRegClass(ArgTypeVRegs[i])); in lowerFormalArguments()
458 MRI->setType(ArgReg, GR->getRegType(ArgTypeVRegs[i])); in lowerFormalArguments()
460 .addDef(ArgReg) in lowerFormalArguments()
464 GR->addGlobalObject(&Arg, &MIRBuilder.getMF(), ArgReg); in lowerFormalArguments()
607 Register ArgReg = Arg.Regs[0]; in lowerCall() local
608 ArgVRegs.push_back(ArgReg); in lowerCall()
609 SPIRVType *SpvType = GR->getSPIRVTypeForVReg(ArgReg); in lowerCall()
628 GR->assignSPIRVTypeToVReg(SpvType, ArgReg, MF); in lowerCall()
631 if (!MRI->getRegClassOrNull(ArgReg)) { in lowerCall()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp3401 Register ArgReg = ArgRegs[VA.getValNo()]; in fastLowerCall() local
3413 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3414 ArgVT, ArgReg); in fastLowerCall()
3426 ArgReg = fastEmitZExtFromI1(MVT::i8, ArgReg); in fastLowerCall()
3429 if (!ArgReg) in fastLowerCall()
3433 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3434 ArgVT, ArgReg); in fastLowerCall()
3442 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3443 ArgVT, ArgReg); in fastLowerCall()
3445 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp1097 for (unsigned ArgReg : {ARM::R0, ARM::R1, ARM::R2, ARM::R3}) in spillCalleeSavedRegisters()
1098 if (!MF.getRegInfo().isLiveIn(ArgReg)) in spillCalleeSavedRegisters()
1099 FrameRecordCopyRegs.insert(ArgReg); in spillCalleeSavedRegisters()
1113 for (unsigned ArgReg : {ARM::R0, ARM::R1, ARM::R2, ARM::R3}) in spillCalleeSavedRegisters()
1114 if (!MF.getRegInfo().isLiveIn(ArgReg)) in spillCalleeSavedRegisters()
1115 CopyRegs.insert(ArgReg); in spillCalleeSavedRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1205 Register ArgReg = getRegForValue(ArgVal); in processCallArgs() local
1206 if (!ArgReg) in processCallArgs()
1217 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
1218 if (!ArgReg) in processCallArgs()
1225 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
1226 if (!ArgReg) in processCallArgs()
1237 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
H A DMipsISelLowering.cpp3864 Register ArgReg = VA.getLocReg(); in LowerFormalArguments() local
3869 unsigned Reg = addLiveIn(DAG.getMachineFunction(), ArgReg, RC); in LowerFormalArguments()
4578 unsigned ArgReg = ByValArgRegs[FirstReg + I]; in copyByValRegs() local
4579 unsigned VReg = addLiveIn(MF, ArgReg, RC); in copyByValRegs()
4618 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg() local
4619 RegsToPass.push_back(std::make_pair(ArgReg, LoadVal)); in passByValArg()
4667 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg() local
4668 RegsToPass.push_back(std::make_pair(ArgReg, Val)); in passByValArg()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp835 Register ArgReg = Args[i].Regs[Part]; in handleAssignments() local
870 ArgReg = PointerToStackReg; in handleAssignments()
894 Handler.assignValueToAddress(ArgReg, StackAddr, PointerTy, MPO, VA); in handleAssignments()
939 Handler.assignValueToReg(ArgReg, ThisReturnRegs[Part], VA); in handleAssignments()
941 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA); in handleAssignments()
944 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA); in handleAssignments()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMIRYamlMapping.h493 static void mapping(IO &YamlIO, CallSiteInfo::ArgRegPair &ArgReg) {
494 YamlIO.mapRequired("arg", ArgReg.ArgNo);
495 YamlIO.mapRequired("reg", ArgReg.Reg);
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMIRPrinter.cpp540 for (auto ArgReg : CSInfo.second.ArgRegPairs) { in convertCallSiteObjects() local
542 YmlArgReg.ArgNo = ArgReg.ArgNo; in convertCallSiteObjects()
543 printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI); in convertCallSiteObjects()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp1177 for (std::pair<MCRegister, Register> ArgReg : ImplicitArgRegs) { in handleImplicitCallArguments()
1178 MIRBuilder.buildCopy((Register)ArgReg.first, ArgReg.second); in handleImplicitCallArguments()
1179 CallInst.addReg(ArgReg.first, RegState::Implicit); in handleImplicitCallArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1458 unsigned ArgReg; in processCallArgs() local
1460 ArgReg = NextFPR++; in processCallArgs()
1464 ArgReg = NextGPR++; in processCallArgs()
1467 TII.get(TargetOpcode::COPY), ArgReg).addReg(Arg); in processCallArgs()
1468 RegArgs.push_back(ArgReg); in processCallArgs()
H A DPPCISelLowering.cpp7416 const MCPhysReg ArgReg = VA.getLocReg(); in LowerFormalArguments_AIX() local
7421 StackSize, mapArgRegToOffsetAIX(ArgReg, FL), /* IsImmutable */ false, in LowerFormalArguments_AIX()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3033 Register ArgReg = getRegForValue(ArgVal); in processCallArgs() local
3034 if (!ArgReg) in processCallArgs()
3044 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
3045 if (!ArgReg) in processCallArgs()
3054 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
3055 if (!ArgReg) in processCallArgs()
3066 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
3095 if (!emitStore(ArgVT, ArgReg, Addr, MMO)) in processCallArgs()
H A DAArch64ISelLowering.cpp9227 [&VA](MachineFunction::ArgRegPair ArgReg) { in LowerCall() argument
9228 return ArgReg.Reg == VA.getLocReg(); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFastISel.cpp907 for (unsigned ArgReg : Args) in selectCall() local
908 MIB.addReg(ArgReg); in selectCall()
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DBugReporterVisitors.cpp3375 const MemRegion *ArgReg = Call->getArgSVal(Idx).getAsRegion(); in VisitNode() local
3379 if ( !ArgReg || !R->isSubRegionOf(ArgReg->StripCasts())) in VisitNode()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfDebug.cpp824 for (const auto &ArgReg : CSInfo->second.ArgRegPairs) { in collectCallSiteParameters() local
826 ForwardedRegWorklist.insert({ArgReg.Reg, {{ArgReg.Reg, EmptyExpr}}}) in collectCallSiteParameters()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp110 Register ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg(); in parametersInCSRMatch() local
111 if (MRI.getLiveInPhysReg(ArgReg) != Reg) in parametersInCSRMatch()