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Searched refs:AddDReg (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp1105 ARMBaseInstrInfo::AddDReg(MachineInstrBuilder &MIB, unsigned Reg, in AddDReg() function in ARMBaseInstrInfo
1178 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
1179 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI); in storeRegToStackSlot()
1189 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
1190 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI); in storeRegToStackSlot()
1240 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
1241 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); in storeRegToStackSlot()
1242 AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI); in storeRegToStackSlot()
1272 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
1273 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); in storeRegToStackSlot()
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H A DThumb2InstrInfo.cpp199 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
200 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI); in storeRegToStackSlot()
242 AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI); in loadRegFromStackSlot()
243 AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI); in loadRegFromStackSlot()
H A DARMBaseInstrInfo.h240 const MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, unsigned Reg,