| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/PDB/ |
| H A D | UDTLayout.cpp | 121 uint32_t Abs = LayoutItemBase::tailPadding(); in tailPadding() local
125 if (Abs < ChildPadding) in tailPadding()
126 Abs = 0; in tailPadding()
128 Abs -= ChildPadding; in tailPadding()
130 return Abs; in tailPadding()
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCAssembler.cpp | 1119 bool Abs = getWriter().getSubsectionsViaSymbols() in relaxLEB() local
1122 if (!Abs) { in relaxLEB()
1218 bool Abs = DF.getAddrDelta().evaluateKnownAbsolute(AddrDelta, *this); in relaxDwarfLineAddr() local
1219 assert(Abs && "We created a line delta with an invalid expression"); in relaxDwarfLineAddr()
1220 (void)Abs; in relaxDwarfLineAddr()
1239 bool Abs = DF.getAddrDelta().evaluateAsAbsolute(Value, *this); in relaxDwarfCallFrameFragment() local
1240 if (!Abs) { in relaxDwarfCallFrameFragment()
1271 bool Abs = PF.getAddrDelta().evaluateKnownAbsolute(AddrDelta, *this); in relaxPseudoProbeAddr() local
1272 assert(Abs && "We created a pseudo probe with an invalid expression"); in relaxPseudoProbeAddr()
1273 (void)Abs; in relaxPseudoProbeAddr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIPeepholeSDWA.cpp | 121 bool Abs; member in __anon5b8513100111::SDWASrcOperand
130 SrcSel(SrcSel_), Abs(Abs_), Neg(Neg_), Sext(Sext_) {} in SDWASrcOperand()
138 bool getAbs() const { return Abs; } in getAbs()
325 if (Abs || Neg) { in getSrcMods()
328 Mods |= Abs ? SISrcMods::ABS : 0u; in getSrcMods()
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| H A D | R600ISelLowering.h | 111 SDValue &Neg, SDValue &Abs, SDValue &Sel, SDValue &Imm,
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| H A D | R600ISelLowering.cpp | 1944 SDValue &Src, SDValue &Neg, SDValue &Abs, in FoldOperand() argument
1959 if (!Abs.getNode()) in FoldOperand()
1962 Abs = DAG.getTargetConstant(1, SDLoc(ParentNode), MVT::i32); in FoldOperand()
2118 SDValue &Abs = Ops[AbsIdx[i] - 1]; in PostISelFolding() local
2124 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, FakeOp, DAG)) in PostISelFolding()
2157 SDValue &Abs = (AbsIdx[i] > -1) ? Ops[AbsIdx[i] - 1] : FakeAbs; in PostISelFolding() local
2167 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, Imm, DAG)) in PostISelFolding()
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| /freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/ |
| H A D | sanitizer_stackdepot.cpp | 80 Abs(common_flags()->compress_stack_depot))); in CompressStackStore()
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| H A D | sanitizer_common.h | 488 constexpr T Abs(T a) { in Abs() function
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ExpandLargeFpConvert.cpp | 170 Value *Abs = Builder.CreateAnd(ARep, SignificandMask); in expandFPToI() local
171 Value *Or = Builder.CreateOr(Abs, ImplicitBit); in expandFPToI()
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| /freebsd/usr.bin/ee/nls/de_DE.ISO8859-1/ |
| H A D | ee.msg | 14 5 "Automatische Abs�tze "
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| /freebsd/contrib/llvm-project/lld/ELF/ |
| H A D | Config.h | 91 enum class Target2Policy { Abs, Rel, GotRel }; enumerator
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| H A D | Driver.cpp | 761 return Target2Policy::Abs; in getTarget2()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 77 bool Abs = false; member
82 bool hasFPModifiers() const { return Abs || Neg; } in hasFPModifiers()
88 Operand |= Abs ? SISrcMods::ABS : 0u; in getFPModifiersOperand()
1202 OS << "abs:" << Mods.Abs << " neg: " << Mods.Neg << " sext:" << Mods.Sext; in operator <<()
2197 if (Imm.Mods.Abs) { in applyInputFPModifiers()
3333 bool Abs, SP3Abs; in parseRegOrImmWithFPInputMods() local
3350 Abs = trySkipId("abs"); in parseRegOrImmWithFPInputMods()
3351 if (Abs && !skipToken(AsmToken::LParen, "expected left paren after abs")) in parseRegOrImmWithFPInputMods()
3360 if (Abs && SP3Abs) in parseRegOrImmWithFPInputMods()
3370 return (SP3Neg || Neg || SP3Abs || Abs || Lit) ? ParseStatus::Failure : Res; in parseRegOrImmWithFPInputMods()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXIL.td | 258 def Abs : DXILOpMapping<6, unary, int_fabs,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 8337 auto Abs = MIRBuilder.buildAnd(IntTy, AsInt, ValueMaskC); in lowerISFPCLASS() local
8339 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_NE, DstTy, AsInt, Abs); in lowerISFPCLASS()
8351 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy, Abs, in lowerISFPCLASS()
8361 auto Cmp = MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy, Abs, in lowerISFPCLASS()
8387 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy, Abs, ZeroC)); in lowerISFPCLASS()
8396 auto V = (PartialCheck == fcPosSubnormal) ? AsInt : Abs; in lowerISFPCLASS()
8413 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy, Abs, InfC)); in lowerISFPCLASS()
8427 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_UGT, DstTy, Abs, InfC)); in lowerISFPCLASS()
8430 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_UGE, DstTy, Abs, in lowerISFPCLASS()
8436 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_UGT, DstTy, Abs, InfC); in lowerISFPCLASS()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 521 Value *Abs = Builder.CreateBinaryIntrinsic( in visitMul() local
523 Abs->takeName(&I); in visitMul()
524 return replaceInstUsesWith(I, Abs); in visitMul()
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| H A D | InstCombineCalls.cpp | 1867 Value *Abs = Builder.CreateBinaryIntrinsic( in visitCallInst() local
1874 Abs = Builder.CreateNeg(Abs, "nabs", IntMinIsPoison); in visitCallInst()
1875 return replaceInstUsesWith(CI, Abs); in visitCallInst()
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| H A D | InstCombineSelect.cpp | 1212 Value *Abs = in canonicalizeSPF() local
1216 return IC.Builder.CreateNeg(Abs); // Always without NSW flag! in canonicalizeSPF()
1217 return Abs; in canonicalizeSPF()
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| H A D | InstCombineAndOrXor.cpp | 4923 if (Instruction *Abs = canonicalizeAbs(I, Builder)) in visitXor() local
4924 return Abs; in visitXor()
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-nm/ |
| H A D | llvm-nm.cpp | 1291 bool Abs = ((EFlags & MachO::EXPORT_SYMBOL_FLAGS_KIND_MASK) == in dumpSymbolsFromDLInfoMachO() local
1298 if (Abs) { in dumpSymbolsFromDLInfoMachO()
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| /freebsd/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | ARM.cpp | 141 if (config->target2 == Target2Policy::Abs) in getRelExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 470 unsigned Abs = Float64 ? WebAssembly::ABS_F64 : WebAssembly::ABS_F32; in LowerFPToInt() local
517 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 2870 SDValue Abs = Signed ? DAG.getNode(ISD::ABS, dl, InpTy, Op0) : Op0; in ExpandHvxIntToFp()
2871 SDValue Clz = DAG.getNode(ISD::CTLZ, dl, InpTy, Abs); in ExpandHvxIntToFp() local
2873 SDValue Frac0 = DAG.getNode(ISD::SHL, dl, InpTy, {Abs, NLeft}); in ExpandHvxIntToFp()
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| H A D | HexagonPatternsHVX.td | 940 // Abs = vxor(v27,v29) ; ^ masks
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 2585 SDValue Abs = DAG.getNode(ISD::AND, dl, AsIntVT, AsInt, SignMask); in expandFrexp() local
2588 DAG.getNode(ISD::ADD, dl, AsIntVT, Abs, NegSmallestNormalizedInt); in expandFrexp()
2593 DAG.getSetCC(dl, SetCCVT, Abs, SmallestNormalizedInt, ISD::SETULT); in expandFrexp()
2606 DAG.getNode(ISD::SELECT, dl, AsIntVT, IsDenormal, ExpMaskScaled, Abs); in expandFrexp()
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | BuiltinsNVPTX.def | 321 // Abs
|