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Searched refs:AVX (Results 1 – 25 of 55) sorted by relevance

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/freebsd/sys/contrib/openzfs/include/
H A Dzfs_fletcher.h105 #if HAVE_SIMD(AVX) && HAVE_SIMD(AVX2)
147 #if HAVE_SIMD(AVX) && HAVE_SIMD(AVX2)
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallingConv.td257 // Boolean vectors of AVX-512 are returned in SIMD registers.
258 // The call from AVX to AVX-512 function should work,
259 // since the boolean types in AVX/AVX2 are promoted by default.
275 // supported while using the AVX target feature.
281 // supported while using the AVX-512 target feature.
562 // Boolean vectors of AVX-512 are passed in SIMD registers.
563 // The call from AVX to AVX-512 function should work,
564 // since the boolean types in AVX/AVX2 are promoted by default.
703 // AVX
707 // AVX-512
[all …]
H A DX86.td104 def FeatureAVX : SubtargetFeature<"avx", "X86SSELevel", "AVX",
105 "Enable AVX instructions",
119 "Enable AVX-512 instructions",
122 "Enable AVX-512 Conflict Detection Instructions",
125 "true", "Enable AVX-512 Population Count Instructions",
131 "Enable AVX-512 Doubleword and Quadword Instructions",
134 "Enable AVX-512 Byte and Word Instructions",
137 "Enable AVX-512 Vector Length eXtensions",
140 "Enable AVX-512 Vector Byte Manipulation Instructions",
143 "Enable AVX-512 further Vector Byte Manipulation Instructions",
[all …]
H A DX86InstrUtils.td490 // AVX instructions have a 'v' prefix in the mnemonic
507 // AVX instructions have a 'v' prefix in the mnemonic
521 // AVX instructions have a 'v' prefix in the mnemonic
536 // AVX instructions have a 'v' prefix in the mnemonic
559 // AVX instructions have a 'v' prefix in the mnemonic
570 // VSSI - SSE1 instructions with XS prefix in AVX form.
571 // VPSI - SSE1 instructions with PS prefix in AVX form, packed single.
604 // VSDI - SSE2 scalar instructions with XD prefix in AVX form.
605 // VPDI - SSE2 vector instructions with PD prefix in AVX form,
607 // VS2I - SSE2 scalar instructions with PD prefix in AVX form.
[all …]
H A DX86Subtarget.h54 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512 enumerator
199 bool hasAVX() const { return X86SSELevel >= AVX; } in hasAVX()
H A DX86RegisterInfo.td364 // XMM16-31 registers, used by AVX-512 instructions.
383 // YMM0-15 registers, used by AVX instructions and
384 // YMM16-31 registers, used by AVX-512 instructions.
399 // ZMM Registers, used by AVX-512 instructions.
408 // Mask Registers, used by AVX-512 instructions.
800 // AVX-512 vector/mask registers.
808 // Scalar AVX-512 floating point registers.
825 // Extended VR128 and VR256 for AVX-512 instructions
H A DX86InstrOperands.td392 // Unsigned immediate used by SSE/AVX instructions
437 // Unsigned 8-bit immediate used by SSE/AVX instructions.
453 // Used by some SSE/AVX instructions that use intrinsics.
H A DX86ScheduleBtVer2.td25 // FIXME: SSE4/AVX is unimplemented. This flag is set to allow
806 // AVX instructions.
834 // SSE2/AVX Store Selected Bytes of Double Quadword - (V)MASKMOVDQ
996 // AVX Zero-idioms.
1029 // AVX
1048 // AVX variants.
/freebsd/sys/contrib/openzfs/lib/libspl/include/sys/
H A Dsimd.h90 AVX, enumerator
150 [AVX] = {1U, 0U, 1U << 28, ECX },
226 CPUID_FEATURE_CHECK(avx, AVX);
/freebsd/sys/contrib/openzfs/module/icp/algs/sha2/
H A Dsha512_impl.c68 #if HAVE_SIMD(AVX)
176 #if defined(__x86_64) && HAVE_SIMD(AVX)
H A Dsha256_impl.c82 #if HAVE_SIMD(AVX)
192 #if defined(__x86_64) && HAVE_SIMD(AVX)
/freebsd/contrib/llvm-project/llvm/lib/Support/BLAKE3/
H A Dblake3_dispatch.c98 AVX = 1 << 3, enumerator
146 features |= AVX; in get_cpu_features()
/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/modes/
H A Dghash-x86_64.S72 # Broadwell 0.45(+110%)(if system doesn't support AVX)
76 # Knights L 2.12(-) (if system doesn't support AVX)
81 # ... 8x aggregate factor AVX code path is using reduction algorithm
82 # suggested by Shay Gueron[1]. Even though contemporary AVX-capable
98 #if defined(__x86_64__) && HAVE_SIMD(AVX) && \
/freebsd/crypto/openssl/doc/man3/
H A DOPENSSL_ia32cap.pod73 =item bit #0+60 denoting AVX extension;
134 =item bit #128+55 denoting availability of AVX-IFMA extension;
186 (disable all post-AVX extensions):
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DVFABIDemangler.h50 AVX, // x86 AVX enumerator
/freebsd/sys/contrib/openzfs/module/zcommon/
H A Dzfs_fletcher_intel.c44 #if HAVE_SIMD(AVX) && HAVE_SIMD(AVX2)
/freebsd/sys/contrib/libsodium/
H A Dconfigure.ac435 AC_MSG_CHECKING(for AVX instructions set)
438 # error NativeClient detected - Avoiding AVX opcodes
444 AC_DEFINE([HAVE_AVXINTRIN_H], [1], [AVX is available])
632 AC_MSG_CHECKING(whether we can assemble AVX opcodes)
646 AC_DEFINE([HAVE_AVX_ASM], [1], [AVX opcodes are supported])
H A DChangeLog70 AVX* when temperature/power consumption is a concern.
207 - Handle the case where the CPU supports AVX, but we are running
208 on an hypervisor with AVX disabled/not supported.
217 merged in, and is automatically used on CPUs supporting the AVX
/freebsd/sys/contrib/openzfs/config/
H A Dtoolchain-simd.m475 ZFS_AC_SIMD_CHECK([AVX], ["vmovdqa %ymm0, %ymm1"])
/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DX86.cpp515 .Case("+avx", AVX) in handleTargetFeatures()
1046 case AVX: in getTargetDefines()
1077 case AVX: in getTargetDefines()
1255 .Case("avx", SSELevel >= AVX) in hasFeature()
H A DX86.h70 AVX, enumerator
356 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX) in getABI()
/freebsd/sys/contrib/openzfs/module/icp/include/modes/
H A Dmodes.h43 #if defined(__x86_64__) && HAVE_SIMD(AVX) && \
/freebsd/sys/contrib/xen/arch-x86/
H A Dcpufeatureset.h150 XEN_CPUFEATURE(AVX, 1*32+28) /*A Advanced Vector Extensions */
/freebsd/sys/contrib/libb2/
H A Dblake2-dispatch.c30 AVX = 4, enumerator
126 feature = AVX; in get_cpu_features()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DVFABIDemangling.cpp

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