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Searched refs:AVL (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPISelLowering.cpp24 SDValue AVL = in splitMaskArithmetic() local
28 SDValue LoA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Lo, AVL); in splitMaskArithmetic()
29 SDValue HiA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Hi, AVL); in splitMaskArithmetic()
30 SDValue LoB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Lo, AVL); in splitMaskArithmetic()
31 SDValue HiB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Hi, AVL); in splitMaskArithmetic()
35 return CDAG.getPack(MVT::v512i1, LoRes, HiRes, AVL); in splitMaskArithmetic()
63 SDValue AVL; in lowerToVVP() local
73 AVL = Op->getOperand(*AVLIdx); in lowerToVVP()
77 if (!AVL) in lowerToVVP()
78 AVL in lowerToVVP()
132 SDValue AVL = getNodeAVL(Op); lowerVVP_LOAD_STORE() local
270 SDValue AVL = getAnnotatedNodeAVL(Op).first; lowerVVP_GATHER_SCATTER() local
404 auto AVL = getNodeAVL(Op); legalizePackedAVL() local
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H A DVECustomDAG.cpp214 bool isLegalAVL(SDValue AVL) { return AVL->getOpcode() == VEISD::LEGALAVL; } in isLegalAVL() argument
396 SDValue AVL = getNodeAVL(Op); in getAnnotatedNodeAVL() local
397 if (!AVL) in getAnnotatedNodeAVL()
399 if (isLegalAVL(AVL)) in getAnnotatedNodeAVL()
400 return {AVL->getOperand(0), true}; in getAnnotatedNodeAVL()
401 return {AVL, false}; in getAnnotatedNodeAVL()
414 auto AVL = getConstant(MaskVT.getVectorNumElements(), MVT::i32); in getConstantMask() local
415 auto Res = getNode(VEISD::VEC_BROADCAST, MaskVT, {TrueVal, AVL}); in getConstantMask()
423 SDValue AVL) const { in getMaskBroadcast()
440 DAG.getNode(VEISD::VEC_BROADCAST, DL, CmpVecTy, {CmpElem, AVL}); in getMaskBroadcast()
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H A DVECustomDAG.h77 bool isLegalAVL(SDValue AVL);
137 SDValue AVL; member
138 VETargetMasks(SDValue Mask = SDValue(), SDValue AVL = SDValue())
139 : Mask(Mask), AVL(AVL) {} in Mask()
185 SDValue VectorV, SDValue Mask, SDValue AVL,
190 SDValue getUnpack(EVT DestVT, SDValue Vec, PackElem Part, SDValue AVL) const;
191 SDValue getPack(EVT DestVT, SDValue LoVec, SDValue HiVec, SDValue AVL) const;
202 SDValue getMaskBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const;
203 SDValue getBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const;
206 SDValue annotateLegalAVL(SDValue AVL) const;
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H A DVEISelLowering.cpp1845 auto AVL = CDAG.getConstant(NumEls, MVT::i32); in lowerBUILD_VECTOR() local
1846 return CDAG.getBroadcast(ResultVT, ScalarV, AVL); in lowerBUILD_VECTOR()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVSDPatterns.td67 (load_instr (m.Mask (IMPLICIT_DEF)), GPR:$rs1, m.AVL,
71 (store_instr VR:$rs2, GPR:$rs1, m.AVL, m.Log2SEW)>;
150 vti.LMul, vti.AVL, vti.RegClass, isSEWAware>;
153 vti.LMul, vti.AVL, vti.RegClass,
166 vti.LMul, vti.AVL, vti.RegClass,
225 vti.LMul, vti.AVL, vti.RegClass, isSEWAware>;
228 vti.Log2SEW, vti.LMul, vti.AVL, vti.RegClass,
240 vti.LMul, vti.AVL, vti.RegClass, isSEWAware>;
243 vti.Log2SEW, vti.LMul, vti.AVL, vti.RegClass,
262 fvti.AVL, fvti.Log2SEW, TA_MA)>;
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H A DRISCVInstrInfoVPseudos.td82 def AVL : RegisterOperand<GPRNoX0> {
88 // rd | rs1 | AVL value | Effect on vl
232 def VLOpFrag : PatFrag<(ops), (XLenVT (VLOp (XLenVT AVL:$vl)))>;
235 // We can't use X0 register becuase the AVL operands use GPRNoX0.
265 // The pattern fragment which produces the AVL operand, representing the
267 OutPatFrag AVL = VLMax;
394 // The pattern fragment which produces the AVL operand, representing the
397 OutPatFrag AVL = VLMax;
764 (ins RetClass:$dest, GPRMem:$rs1, AVL:$vl, ixlenimm:$sew,
782 VMaskOp:$vm, AVL
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H A DRISCVInstrInfoZvk.td221 (ins RetClass:$rd, OpClass:$rs2, AVL:$vl, ixlenimm:$sew, ixlenimm:$policy), []>,
238 AVL:$vl, ixlenimm:$sew, ixlenimm:$policy), []>,
580 vti.AVL, vti.Log2SEW, TA_MA)>;
601 vti.AVL, vti.Log2SEW, TA_MA)>;
609 vti.AVL, vti.Log2SEW, TA_MA)>;
650 vti.AVL, vti.Log2SEW, TA_MA)>;
666 vti.AVL, vti.Log2SEW, TA_MA)>;
673 vti.AVL, vti.Log2SEW, TA_MA)>;
680 vti.AVL, vti.Log2SEW, TA_MA)>;
H A DRISCVInstrInfoXSf.td229 AVL:$vl, ixlenimm:$sew), []>,
242 AVL:$vl, ixlenimm:$sew), []>,
256 AVL:$vl, ixlenimm:$sew), []>,
269 AVL:$vl, ixlenimm:$sew), []>,
283 AVL:$vl, ixlenimm:$sew), []>,
297 AVL:$vl, ixlenimm:$sew), []>,
H A DRISCVInsertVSETVLI.cpp1622 auto &AVL = MI.getOperand(1); in canMutatePriorConfig() local
1627 if (AVL.isReg() && AVL.getReg() != RISCV::X0 && in canMutatePriorConfig()
1628 (!MRI->hasOneDef(AVL.getReg()) || !PrevAVL.isReg() || in canMutatePriorConfig()
1629 PrevAVL.getReg() != AVL.getReg())) in canMutatePriorConfig()
H A DRISCVISelDAGToDAG.cpp590 uint64_t AVL = C->getZExtValue(); in selectVSETVLI() local
591 if (isUInt<5>(AVL)) { in selectVSETVLI()
592 SDValue VLImm = CurDAG->getTargetConstant(AVL, DL, XLenVT); in selectVSETVLI()
H A DRISCVISelLowering.cpp8847 SDValue AVL = getVLOperand(Op); in lowerVectorIntrinsicScalars()
8850 // Optimize for constant AVL in lowerVectorIntrinsicScalars()
8851 if (isa<ConstantSDNode>(AVL)) { in lowerVectorIntrinsicScalars()
8855 uint64_t AVLInt = AVL->getAsZExtVal(); in lowerVectorIntrinsicScalars()
8869 // For AVL between (MinVLMAX, 2 * MaxVLMAX), the actual working vl in lowerVectorIntrinsicScalars()
8883 SDValue VL = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, XLenVT, SETVL, AVL, in lowerVectorIntrinsicScalars()
8928 DAG.getUNDEF(VT), AVL); in lowerVectorIntrinsicScalars()
8932 MaskedOff, AVL); in lowerVectorIntrinsicScalars()
8980 SDValue AVL = DAG.getNode(ISD::ZERO_EXTEND, DL, XLenVT, N->getOperand(1)); in lowerGetVectorLength()
8984 DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, XLenVT, ID, AVL, Se in lowerGetVectorLength()
8845 SDValue AVL = getVLOperand(Op); lowerVectorIntrinsicScalars() local
8978 SDValue AVL = DAG.getNode(ISD::ZERO_EXTEND, DL, XLenVT, N->getOperand(1)); lowerGetVectorLength() local
9791 isNonZeroAVL(SDValue AVL) isNonZeroAVL() argument
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/freebsd/contrib/ncurses/
H A DAUTHORS37 AVL Alexander V Lukyanov
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopIdiomVectorize.cpp505 Value *AVL = Builder.CreateSub(ExtEnd, VectorIndexPhi, "avl", /*HasNUW=*/true, in createPredicatedFindMismatch() local
512 {I64Type}, {AVL, VF, Builder.getTrue()}); in createPredicatedFindMismatch()
H A DVPlanRecipes.cpp466 auto GetEVL = [=](VPTransformState &State, Value *AVL) { in generatePerPart() argument
467 assert(AVL->getType()->isIntegerTy() && in generatePerPart()
476 {AVL, VFArg, State.Builder.getTrue()}); in generatePerPart()
485 Value *AVL = State.Builder.CreateSub(TripCount, Index); in generatePerPart() local
486 Value *EVL = GetEVL(State, AVL); in generatePerPart()
/freebsd/sys/contrib/edk2/Include/Library/
H A DBaseLib.h5362 UINT32 AVL:1; member
5460 UINT32 AVL:1; ///< Available for use by system software member
5517 UINT32 AVL:1; ///< Available for use by system software member
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsRISCV.td148 /* AVL */ [LLVMMatchType<0>,
/freebsd/contrib/one-true-awk/testdir/
H A Dfunstack.ok1126 Retrieval Using AVL Trees . . . . . . . 843--843
1499 Caxton C. Foster A Generalization of AVL Trees . . . . . 513--517
H A Dfunstack.in8194 title = "On {Foster}'s Information Storage and Retrieval Using {AVL} Trees",
8208 …keywords = "(mathematical); AVL trees; binary trees; file organisation; information retrieval;…
11203 title = "A Generalization of {AVL} Trees",
11214 …AVL trees is proposed in which imbalances up to (triangle shape) is a small integer. An experiment…
11220 …keywords = "AVL trees; balanced trees; file organisation; generalisation; information retrieva…
17657 …is shown that the only statistic of HB left bracket 1 right bracket trees (AVL trees) that is a fu…
20373 …AVL and extensions), weight-balance (i.e. BB and WB), and total restructuring-for building balance…
20380 …keywords = "analysis of algorithms; AVL trees; binary search trees; computer programming --- S…
22579 …keywords = "AVL trees; balanced trees; binary search; computer programming; dynamic balancing",
23144 …AVL tree in that only one bit of balancing information is required (two bits are required for the …
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/freebsd/share/misc/
H A Dusb_vendors1341 0961 AVL Flash Card Reader