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Searched refs:AR_PHY_ERR_CCK_TIMING (Results 1 – 8 of 8) sorted by relevance

/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_recv.c40 if (phybits & (AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING)) in ar5416GetRxFilter()
58 phybits |= AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING; in ar5416SetRxFilter()
H A Dar5416_ani.c85 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); in enableAniMIBCounters()
526 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); in ar5416AniRestart()
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_recv.c217 if (phybits & (AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING)) { in ar9300_get_rx_filter()
246 phybits |= AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING; in ar9300_set_rx_filter()
H A Dar9300_ani.c152 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); in ar9300_enable_mib_counters()
851 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); in ar9300_ani_restart()
1008 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); in ar9300_ani_reset()
H A Dar9300reg.h1712 #define AR_PHY_ERR_CCK_TIMING 0x02000000 // Bit 25 is AH_FALSE detect for CCK macro
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_recv.c173 if (phybits & (AR_PHY_ERR_OFDM_TIMING|AR_PHY_ERR_CCK_TIMING)) in ar5212GetRxFilter()
197 phybits |= AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING; in ar5212SetRxFilter()
H A Dar5212_ani.c81 OS_REG_WRITE(ah, AR_PHYCNTMASK2, AR_PHY_ERR_CCK_TIMING); in enableAniMIBCounters()
572 OS_REG_WRITE(ah, AR_PHYCNTMASK2, AR_PHY_ERR_CCK_TIMING); in ar5212AniRestart()
H A Dar5212reg.h963 #define AR_PHY_ERR_CCK_TIMING 0x02000000 /* False detect for CCK */ macro