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Searched refs:AR_IMR_S2_QCU_TXURN (Results 1 – 8 of 8) sorted by relevance

/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211reg.h455 #define AR_IMR_S2_QCU_TXURN 0x000003FF /* Mask for TXURN (QCU 0-9) */ macro
H A Dar5211_xmit.c191 AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask); in setTxQInterrupts()
H A Dar5211_reset.c495 OS_REG_WRITE(ah, AR_IMR_S2, (AR_IMR_S2_QCU_TXURN & AR_QCU_0)); in ar5211Reset()
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212reg.h527 #define AR_IMR_S2_QCU_TXURN 0x000003FF /* Mask for TXURN (QCU 0-9) */ macro
H A Dar5212_xmit.c223 AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask); in setTxQInterrupts()
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_xmit.c240 AR_IMR_S2, AR_IMR_S2_QCU_TXURN, ahp->ah_tx_urn_interrupt_mask); in set_tx_q_interrupts()
H A Dar9300reg.h367 #define AR_IMR_S2_QCU_TXURN 0x000003FF // Mask for TXURN (QCU 0-9) macro
/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_xmit.c1233 AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask); in setTxQInterrupts()