Searched refs:AR_CR_RXD (Results 1 – 14 of 14) sorted by relevance
| /freebsd/sys/dev/ath/ath_hal/ar5211/ |
| H A D | ar5211_recv.c | 67 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */ in ar5211StopDmaReceive()
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| H A D | ar5211reg.h | 274 #define AR_CR_RXD 0x00000020 /* Receive disable */ macro
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| /freebsd/sys/dev/ath/ath_hal/ar5210/ |
| H A D | ar5210_recv.c | 68 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */ in ar5210StopDmaReceive()
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| H A D | ar5210reg.h | 113 #define AR_CR_RXD 0x00000020 /* RX disable */ macro
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| /freebsd/sys/dev/ath/ath_hal/ar5416/ |
| H A D | ar5416_recv.c | 78 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */ in ar5416StopDmaReceive()
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| /freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_recv.c | 138 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); in ar9300_stop_dma_receive()
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| H A D | ar9300_tx99_tgt.c | 506 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); // set receive disable in ar9300_tx99_tgt_start()
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| H A D | ar9300_xmit_ds.c | 499 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* set receive disable */ in ar9300__cont_tx_mode()
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| H A D | ar9300_power.c | 990 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */ in ar9300_set_power_mode_wow_sleep()
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| H A D | ar9300reg.h | 36 #define AR_CR_RXD 0x00000020 // Receive disable macro
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| H A D | ar9300_misc.c | 3866 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* set receive disable */ in ar9300_tx99_start()
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| /freebsd/sys/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212_recv.c | 68 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */ in ar5212StopDmaReceive()
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| H A D | ar5212reg.h | 340 #define AR_CR_RXD 0x00000020 /* Receive disable */ macro
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| H A D | ar5212_reset.c | 1142 OS_REG_SET_BIT(ah, AR_CR, AR_CR_RXD); in ar5212MacStop()
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