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Searched refs:AR_CFG (Results 1 – 16 of 16) sorted by relevance

/freebsd/tools/tools/ath/common/
H A Ddumpregs_5210.c46 DEFBASICfmt(AR_CFG, "CFG", AR_CFG_BITS),
H A Ddumpregs_5211.c44 DEFBASICfmt(AR_CFG, "CFG", AR_CFG_BITS),
H A Ddumpregs_5212.c47 DEFBASICfmt(AR_CFG, "CFG",
H A Ddumpregs_5416.c46 DEFBASIC(AR_CFG, "CFG"),
/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210reg.h38 #define AR_CFG 0x0014 /* Configuration and status register */ macro
H A Dar5210_xmit.c412 v = OS_REG_READ(ah, AR_CFG); in ar5210NumTxPending()
442 if ((OS_REG_READ(ah, AR_CFG) & AR_CFG_TXCNT) == 0) in ar5210StopTxDma()
H A Dar5210_reset.c605 OS_REG_WRITE(ah, AR_CFG, mask); in ar5210SetResetReg()
607 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5210SetResetReg()
/freebsd/sys/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c753 OS_REG_WRITE(ah, AR_CFG, mask); in ar5312SetResetReg()
755 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5312SetResetReg()
/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_reset.c405 OS_REG_WRITE(ah, AR_CFG, in ar5211Reset()
406 OS_REG_READ(ah, AR_CFG) | AR_CFG_CLK_GATE_DIS); in ar5211Reset()
771 OS_REG_WRITE(ah, AR_CFG, mask); in ar5211SetResetReg()
773 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5211SetResetReg()
H A Dar5211reg.h34 #define AR_CFG 0x0014 /* configuration and status register */ macro
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300.h1178 #define ar9300_init_cfg_reg(ah) OS_REG_RMW(ah, AR_CFG, AR_CFG_SWTB | AR_CFG_SWRB,0)
1180 #define ar9300_init_cfg_reg(ah) OS_REG_RMW(ah, AR_CFG, AR_CFG_SWTB,0)
1183 #define ar9300_init_cfg_reg(ah) OS_REG_RMW(ah, AR_CFG, AR_CFG_SWRB,0)
1185 #define ar9300_init_cfg_reg(ah) OS_REG_RMW(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD,0)
H A Dar9300_reset.c1372 OS_REG_CLR_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar9300_set_operating_mode()
1377 OS_REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar9300_set_operating_mode()
2848 OS_REG_CLR_BIT(ah, AR_CFG, AR_CFG_MISSING_TX_INTR_FIX_ENABLE); in ar9300_override_ini()
5266 OS_REG_RMW(ah, AR_CFG, AR_CFG_SWTB | AR_CFG_SWRB, 0); in ar9300_reset()
H A Dar9300reg.h41 #define AR_CFG AR_MAC_DMA_OFFSET(MAC_DMA_CFG) macro
/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_reset.c1427 mask = OS_REG_READ(ah, AR_CFG); in ar5416SetReset()
1434 OS_REG_WRITE(ah, AR_CFG, mask); in ar5416SetReset()
1436 "Setting CFG 0x%x\n", OS_REG_READ(ah, AR_CFG)); in ar5416SetReset()
1450 OS_REG_WRITE(ah, AR_CFG, mask); in ar5416SetReset()
1452 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5416SetReset()
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_reset.c812 OS_REG_CLR_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar5212SetOperatingMode()
817 OS_REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar5212SetOperatingMode()
1287 OS_REG_WRITE(ah, AR_CFG, mask); in ar5212SetResetReg()
1289 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5212SetResetReg()
H A Dar5212reg.h29 #define AR_CFG 0x0014 /* MAC configuration and status register */ macro