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Searched refs:AMDGPUTargetLowering (Results 1 – 11 of 11) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600TargetTransformInfo.h26 class AMDGPUTargetLowering; variable
35 const AMDGPUTargetLowering *TLI;
42 const AMDGPUTargetLowering *getTLI() const { return TLI; } in getTLI()
H A DAMDGPUISelLowering.cpp40 EVT AMDGPUTargetLowering::getEquivalentMemType(LLVMContext &Ctx, EVT VT) { in getEquivalentMemType()
51 unsigned AMDGPUTargetLowering::numBitsUnsigned(SDValue Op, SelectionDAG &DAG) { in numBitsUnsigned()
55 unsigned AMDGPUTargetLowering::numBitsSigned(SDValue Op, SelectionDAG &DAG) { in numBitsSigned()
61 AMDGPUTargetLowering::AMDGPUTargetLowering(const TargetMachine &TM, in AMDGPUTargetLowering() function in AMDGPUTargetLowering
629 bool AMDGPUTargetLowering::mayIgnoreSignedZero(SDValue Op) const { in mayIgnoreSignedZero()
756 bool AMDGPUTargetLowering::allUsesHaveSourceMods(const SDNode *N, in allUsesHaveSourceMods()
782 EVT AMDGPUTargetLowering::getTypeForExtReturn(LLVMContext &Context, EVT VT, in getTypeForExtReturn()
793 MVT AMDGPUTargetLowering::getVectorIdxTy(const DataLayout &) const { in getVectorIdxTy()
797 bool AMDGPUTargetLowering::isSelectSupported(SelectSupportKind SelType) const { in isSelectSupported()
803 bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, in isFPImmLegal()
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H A DAMDGPUCallLowering.h21 class AMDGPUTargetLowering; variable
41 AMDGPUCallLowering(const AMDGPUTargetLowering &TLI);
H A DR600ISelLowering.h24 class R600TargetLowering final : public AMDGPUTargetLowering {
H A DR600ISelLowering.cpp32 : AMDGPUTargetLowering(TM, STI), Subtarget(&STI), Gen(STI.getGeneration()) { in R600TargetLowering()
238 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB); in EmitInstrWithCustomInserter()
400 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG); in LowerOperation()
584 AMDGPUTargetLowering::ReplaceNodeResults(N, Results, DAG); in ReplaceNodeResults()
673 return AMDGPUTargetLowering::LowerGlobalAddress(MFI, Op, DAG); in LowerGlobalAddress()
1836 if (SDValue Ret = AMDGPUTargetLowering::PerformDAGCombine(N, DCI)) in PerformDAGCombine()
1940 return AMDGPUTargetLowering::PerformDAGCombine(N, DCI); in PerformDAGCombine()
2187 return AMDGPUTargetLowering::shouldExpandAtomicRMWInIR(RMW); in shouldExpandAtomicRMWInIR()
H A DAMDGPUISelLowering.h27 class AMDGPUTargetLowering : public TargetLowering {
180 AMDGPUTargetLowering(const TargetMachine &TM, const AMDGPUSubtarget &STI);
H A DSIISelLowering.h31 class SITargetLowering final : public AMDGPUTargetLowering {
H A DAMDGPUISelDAGToDAG.cpp1627 N = AMDGPUTargetLowering::stripBitcast(SDValue(N,0)).getNode(); in findMemSDNode()
1633 dyn_cast<MemSDNode>(AMDGPUTargetLowering::stripBitcast(V))) in findMemSDNode()
3619 const AMDGPUTargetLowering& Lowering = in PostprocessISelDAG()
3620 *static_cast<const AMDGPUTargetLowering*>(getTargetLowering()); in PostprocessISelDAG()
H A DSIISelLowering.cpp86 : AMDGPUTargetLowering(TM, STI), in SITargetLowering()
1159 return AMDGPUTargetLowering::getPointerTy(DL, AS); in getPointerTy()
1171 return AMDGPUTargetLowering::getPointerMemTy(DL, AS); in getPointerMemTy()
3168 return AMDGPUTargetLowering::LowerReturn(Chain, CallConv, isVarArg, Outs, in LowerReturn()
4016 return AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(Op, DAG); in LowerDYNAMIC_STACKALLOC()
5539 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB); in EmitInstrWithCustomInserter()
5754 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG); in LowerOperation()
6470 AMDGPUTargetLowering::ReplaceNodeResults(N, Results, DAG); in ReplaceNodeResults()
7638 return AMDGPUTargetLowering::LowerGlobalAddress(MFI, Op, DAG); in LowerGlobalAddress()
12594 return AMDGPUTargetLowering::performRcpCombine(N, DCI); in performRcpCombine()
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H A DAMDGPULegalizerInfo.cpp2230 AMDGPUTargetLowering::ImplicitParameter Param = in getSegmentAperture()
2231 AS == AMDGPUAS::LOCAL_ADDRESS ? AMDGPUTargetLowering::SHARED_BASE in getSegmentAperture()
2232 : AMDGPUTargetLowering::PRIVATE_BASE; in getSegmentAperture()
5544 B.getMF(), AMDGPUTargetLowering::FIRST_IMPLICIT); in getImplicitArgPtr()
6837 AMDGPUTargetLowering::ImplicitParameter Param = in legalizeTrapHsaQueuePtr()
6838 AMDGPUTargetLowering::QUEUE_PTR; in legalizeTrapHsaQueuePtr()
H A DAMDGPUCallLowering.cpp265 AMDGPUCallLowering::AMDGPUCallLowering(const AMDGPUTargetLowering &TLI) in AMDGPUCallLowering()