1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2017-2026 Morse Micro 4 */ 5 6 #ifndef _MM81X_YAPS_HW_H_ 7 #define _MM81X_YAPS_HW_H_ 8 9 #include <linux/types.h> 10 #include <linux/crc7.h> 11 12 #define MM81X_INT_YAPS_FC_PKT_WAITING_IRQN 0 13 #define MM81X_INT_YAPS_FC_PACKET_FREED_UP_IRQN 1 14 15 struct mm81x_yaps_hw_table { 16 /* NOTE: We need these padding bytes for yaps to work */ 17 u8 padding[4]; 18 __le32 ysl_addr; 19 __le32 yds_addr; 20 __le32 status_regs_addr; 21 22 /* Alloc pool sizes */ 23 __le16 tc_tx_pool_size; 24 __le16 fc_rx_pool_size; 25 u8 tc_cmd_pool_size; 26 u8 tc_beacon_pool_size; 27 u8 tc_mgmt_pool_size; 28 u8 fc_resp_pool_size; 29 u8 fc_tx_sts_pool_size; 30 u8 fc_aux_pool_size; 31 32 /* To chip/from chip queue sizes */ 33 u8 tc_tx_q_size; 34 u8 tc_cmd_q_size; 35 u8 tc_beacon_q_size; 36 u8 tc_mgmt_q_size; 37 u8 fc_q_size; 38 u8 fc_done_q_size; 39 40 __le16 yaps_reserved_page_size; 41 __le16 reserved_unused; 42 } __packed; 43 44 struct mm81x; 45 46 void mm81x_yaps_hw_enable_irqs(struct mm81x *mors, bool enable); 47 int mm81x_yaps_hw_init(struct mm81x *mors); 48 void mm81x_yaps_hw_finish(struct mm81x *mors); 49 void mm81x_yaps_hw_read_table(struct mm81x *mors, 50 struct mm81x_yaps_hw_table *tbl_ptr); 51 52 #endif /* !_MM81X_YAPS_HW_H_ */ 53