1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved 4 * Author: Amelie Delaunay <amelie.delaunay@foss.st.com> for STMicroelectronics. 5 */ 6 7#include "stm32mp15-scmi.dtsi" 8 9/ { 10 reserved-memory { 11 optee@de000000 { 12 reg = <0xde000000 0x2000000>; 13 no-map; 14 }; 15 }; 16 17 arm_wdt: watchdog { 18 compatible = "arm,smc-wdt"; 19 arm,smc-id = <0xbc000000>; 20 status = "disabled"; 21 }; 22 23}; 24 25&adc { 26 vdd-supply = <&scmi_vdd>; 27 vdda-supply = <&scmi_vdd>; 28}; 29 30&cpu0 { 31 clocks = <&scmi_clk CK_SCMI_MPU>; 32}; 33 34&cpu1 { 35 clocks = <&scmi_clk CK_SCMI_MPU>; 36}; 37 38&cryp1 { 39 clocks = <&scmi_clk CK_SCMI_CRYP1>; 40 resets = <&scmi_reset RST_SCMI_CRYP1>; 41}; 42 43&cs42l51 { 44 VL-supply = <&scmi_v3v3>; 45 VD-supply = <&scmi_v1v8_audio>; 46 VA-supply = <&scmi_v1v8_audio>; 47 VAHP-supply = <&scmi_v1v8_audio>; 48}; 49 50&dsi { 51 phy-dsi-supply = <&scmi_reg18>; 52 clocks = <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; 53}; 54 55&gpioz { 56 clocks = <&scmi_clk CK_SCMI_GPIOZ>; 57}; 58 59&hash1 { 60 clocks = <&scmi_clk CK_SCMI_HASH1>; 61 resets = <&scmi_reset RST_SCMI_HASH1>; 62}; 63 64&i2c1 { 65 hdmi-transmitter@39 { 66 iovcc-supply = <&scmi_v3v3_hdmi>; 67 cvcc12-supply = <&scmi_v1v2_hdmi>; 68 }; 69}; 70 71&iwdg2 { 72 clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>; 73 status = "disabled"; 74}; 75 76&m4_rproc { 77 /delete-property/ st,syscfg-holdboot; 78 resets = <&scmi_reset RST_SCMI_MCU>, 79 <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; 80 reset-names = "mcu_rst", "hold_boot"; 81}; 82 83&mdma1 { 84 resets = <&scmi_reset RST_SCMI_MDMA>; 85}; 86 87&optee { 88 interrupt-parent = <&intc>; 89 interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 90}; 91 92&pwr_regulators { 93 vdd-supply = <&scmi_vdd>; 94 vdd_3v3_usbfs-supply = <&scmi_vdd_usb>; 95 status = "disabled"; 96}; 97 98&rcc { 99 compatible = "st,stm32mp1-rcc-secure", "syscon"; 100 clock-names = "hse", "hsi", "csi", "lse", "lsi"; 101 clocks = <&scmi_clk CK_SCMI_HSE>, 102 <&scmi_clk CK_SCMI_HSI>, 103 <&scmi_clk CK_SCMI_CSI>, 104 <&scmi_clk CK_SCMI_LSE>, 105 <&scmi_clk CK_SCMI_LSI>; 106}; 107 108&rng1 { 109 clocks = <&scmi_clk CK_SCMI_RNG1>; 110 resets = <&scmi_reset RST_SCMI_RNG1>; 111}; 112 113&rtc { 114 clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>; 115}; 116 117&scmi_reguls { 118 scmi_vddcore: regulator@3 { 119 reg = <VOLTD_SCMI_STPMIC1_BUCK1>; 120 regulator-name = "vddcore"; 121 }; 122 123 scmi_vdd: regulator@5 { 124 reg = <VOLTD_SCMI_STPMIC1_BUCK3>; 125 regulator-name = "vdd"; 126 }; 127 128 scmi_v3v3: regulator@6 { 129 reg = <VOLTD_SCMI_STPMIC1_BUCK4>; 130 regulator-name = "v3v3"; 131 }; 132 133 scmi_v1v8_audio: regulator@7 { 134 reg = <VOLTD_SCMI_STPMIC1_LDO1>; 135 regulator-name = "v1v8_audio"; 136 }; 137 138 scmi_v3v3_hdmi: regulator@8 { 139 reg = <VOLTD_SCMI_STPMIC1_LDO2>; 140 regulator-name = "v3v3_hdmi"; 141 }; 142 143 scmi_vdd_usb: regulator@a { 144 reg = <VOLTD_SCMI_STPMIC1_LDO4>; 145 regulator-name = "vdd_usb"; 146 }; 147 148 scmi_vdda: regulator@b { 149 reg = <VOLTD_SCMI_STPMIC1_LDO5>; 150 regulator-name = "vdda"; 151 }; 152 153 scmi_v1v2_hdmi: regulator@c { 154 reg = <VOLTD_SCMI_STPMIC1_LDO6>; 155 regulator-name = "v1v2_hdmi"; 156 regulator-min-microvolt = <1200000>; 157 regulator-max-microvolt = <1200000>; 158 regulator-always-on; 159 }; 160 161 scmi_vbus_otg: regulator@f { 162 reg = <VOLTD_SCMI_STPMIC1_PWR_SW1>; 163 regulator-name = "vbus_otg"; 164 }; 165 166 scmi_vbus_sw: regulator@10 { 167 reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>; 168 regulator-name = "vbus_sw"; 169 }; 170}; 171 172&sdmmc1 { 173 vmmc-supply = <&scmi_v3v3>; 174}; 175 176&sdmmc3 { 177 vmmc-supply = <&scmi_v3v3>; 178}; 179 180&usbh_ehci { 181 hub@1 { 182 vdd-supply = <&scmi_v3v3>; 183 }; 184}; 185 186&usbphyc_port0 { 187 phy-supply = <&scmi_vdd_usb>; 188}; 189 190&usbphyc_port1 { 191 phy-supply = <&scmi_vdd_usb>; 192}; 193 194&vrefbuf { 195 vdda-supply = <&scmi_vdd>; 196}; 197