xref: /linux/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_11_0_6_offset.h (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1 /*
2  * Copyright (C) 2020  Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included
12  * in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20  */
21 #ifndef _smuio_11_0_6_OFFSET_HEADER
22 #define _smuio_11_0_6_OFFSET_HEADER
23 
24 
25 
26 // addressBlock: smuio_smuio_SmuSmuioDec
27 // base address: 0x5a000
28 #define mmCGTT_ROM_CLK_CTRL0                                                                           0x00e4
29 #define mmCGTT_ROM_CLK_CTRL0_BASE_IDX                                                                  0
30 #define mmROM_INDEX                                                                                    0x00e5
31 #define mmROM_INDEX_BASE_IDX                                                                           0
32 #define mmROM_DATA                                                                                     0x00e6
33 #define mmROM_DATA_BASE_IDX                                                                            0
34 
35 #endif
36