1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. 5 */ 6 7/ { 8 aliases { 9 ethernet0 = &gmac; 10 mmc0 = &emmc; 11 mmc1 = &sdio; 12 mmc2 = &sdmmc; 13 }; 14 15 chosen { 16 stdout-path = "serial2:1500000n8"; 17 }; 18 19 vcc5v0_sys: regulator-vcc5v0-sys { 20 compatible = "regulator-fixed"; 21 regulator-name = "vcc5v0_sys"; 22 regulator-always-on; 23 regulator-boot-on; 24 regulator-min-microvolt = <5000000>; 25 regulator-max-microvolt = <5000000>; 26 }; 27 28 sdio_pwrseq: pwrseq-sdio { 29 compatible = "mmc-pwrseq-simple"; 30 clocks = <&rk809 1>; 31 clock-names = "ext_clock"; 32 pinctrl-names = "default"; 33 pinctrl-0 = <&wifi_enable_h>; 34 reset-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 35 }; 36}; 37 38&emmc { 39 bus-width = <8>; 40 cap-mmc-highspeed; 41 mmc-hs200-1_8v; 42 non-removable; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_rstnout>; 45 rockchip,default-sample-phase = <90>; 46 vmmc-supply = <&vcc_3v3>; 47 vqmmc-supply = <&vcc_1v8>; 48 status = "okay"; 49}; 50 51&i2c0 { 52 clock-frequency = <400000>; 53 status = "okay"; 54 55 rk809: pmic@20 { 56 compatible = "rockchip,rk809"; 57 reg = <0x20>; 58 interrupt-parent = <&gpio0>; 59 interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>; 60 #clock-cells = <1>; 61 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 62 pinctrl-names = "default"; 63 pinctrl-0 = <&pmic_int_l>; 64 rockchip,system-power-controller; 65 wakeup-source; 66 67 vcc1-supply = <&vcc5v0_sys>; 68 vcc2-supply = <&vcc5v0_sys>; 69 vcc3-supply = <&vcc5v0_sys>; 70 vcc4-supply = <&vcc5v0_sys>; 71 vcc5-supply = <&vcc_buck5>; 72 vcc6-supply = <&vcc_buck5>; 73 vcc7-supply = <&vcc5v0_sys>; 74 vcc8-supply = <&vcc3v3_sys>; 75 vcc9-supply = <&vcc5v0_sys>; 76 77 regulators { 78 vdd_npu_vepu: DCDC_REG1 { 79 regulator-name = "vdd_npu_vepu"; 80 regulator-always-on; 81 regulator-boot-on; 82 regulator-initial-mode = <0x2>; 83 regulator-min-microvolt = <650000>; 84 regulator-max-microvolt = <950000>; 85 regulator-ramp-delay = <6001>; 86 regulator-state-mem { 87 regulator-off-in-suspend; 88 }; 89 }; 90 91 vdd_arm: DCDC_REG2 { 92 regulator-name = "vdd_arm"; 93 regulator-always-on; 94 regulator-boot-on; 95 regulator-initial-mode = <0x2>; 96 regulator-min-microvolt = <725000>; 97 regulator-max-microvolt = <1350000>; 98 regulator-ramp-delay = <6001>; 99 regulator-state-mem { 100 regulator-off-in-suspend; 101 }; 102 }; 103 104 vcc_ddr: DCDC_REG3 { 105 regulator-name = "vcc_ddr"; 106 regulator-always-on; 107 regulator-boot-on; 108 regulator-initial-mode = <0x2>; 109 regulator-state-mem { 110 regulator-on-in-suspend; 111 }; 112 }; 113 114 vcc3v3_sys: DCDC_REG4 { 115 regulator-name = "vcc3v3_sys"; 116 regulator-always-on; 117 regulator-boot-on; 118 regulator-initial-mode = <0x2>; 119 regulator-min-microvolt = <3300000>; 120 regulator-max-microvolt = <3300000>; 121 regulator-state-mem { 122 regulator-on-in-suspend; 123 regulator-suspend-microvolt = <3300000>; 124 }; 125 }; 126 127 vcc_buck5: DCDC_REG5 { 128 regulator-name = "vcc_buck5"; 129 regulator-always-on; 130 regulator-boot-on; 131 regulator-min-microvolt = <2200000>; 132 regulator-max-microvolt = <2200000>; 133 regulator-state-mem { 134 regulator-on-in-suspend; 135 regulator-suspend-microvolt = <2200000>; 136 }; 137 }; 138 139 vcc_0v8: LDO_REG1 { 140 regulator-name = "vcc_0v8"; 141 regulator-always-on; 142 regulator-boot-on; 143 regulator-min-microvolt = <800000>; 144 regulator-max-microvolt = <800000>; 145 regulator-state-mem { 146 regulator-off-in-suspend; 147 }; 148 }; 149 150 vcc1v8_pmu: LDO_REG2 { 151 regulator-name = "vcc1v8_pmu"; 152 regulator-always-on; 153 regulator-boot-on; 154 regulator-min-microvolt = <1800000>; 155 regulator-max-microvolt = <1800000>; 156 regulator-state-mem { 157 regulator-on-in-suspend; 158 regulator-suspend-microvolt = <1800000>; 159 }; 160 }; 161 162 vdd0v8_pmu: LDO_REG3 { 163 regulator-name = "vcc0v8_pmu"; 164 regulator-always-on; 165 regulator-boot-on; 166 regulator-min-microvolt = <800000>; 167 regulator-max-microvolt = <800000>; 168 regulator-state-mem { 169 regulator-on-in-suspend; 170 regulator-suspend-microvolt = <800000>; 171 }; 172 }; 173 174 vcc_1v8: LDO_REG4 { 175 regulator-name = "vcc_1v8"; 176 regulator-always-on; 177 regulator-boot-on; 178 regulator-min-microvolt = <1800000>; 179 regulator-max-microvolt = <1800000>; 180 regulator-state-mem { 181 regulator-on-in-suspend; 182 regulator-suspend-microvolt = <1800000>; 183 }; 184 }; 185 186 vcc_dovdd: LDO_REG5 { 187 regulator-name = "vcc_dovdd"; 188 regulator-always-on; 189 regulator-boot-on; 190 regulator-min-microvolt = <1800000>; 191 regulator-max-microvolt = <1800000>; 192 regulator-state-mem { 193 regulator-off-in-suspend; 194 }; 195 }; 196 197 vcc_dvdd: LDO_REG6 { 198 regulator-name = "vcc_dvdd"; 199 regulator-min-microvolt = <1200000>; 200 regulator-max-microvolt = <1200000>; 201 regulator-state-mem { 202 regulator-off-in-suspend; 203 }; 204 }; 205 206 vcc_avdd: LDO_REG7 { 207 regulator-name = "vcc_avdd"; 208 regulator-min-microvolt = <2800000>; 209 regulator-max-microvolt = <2800000>; 210 regulator-state-mem { 211 regulator-off-in-suspend; 212 }; 213 }; 214 215 vccio_sd: LDO_REG8 { 216 regulator-name = "vccio_sd"; 217 regulator-always-on; 218 regulator-boot-on; 219 regulator-min-microvolt = <1800000>; 220 regulator-max-microvolt = <3300000>; 221 regulator-state-mem { 222 regulator-off-in-suspend; 223 }; 224 }; 225 226 vcc3v3_sd: LDO_REG9 { 227 regulator-name = "vcc3v3_sd"; 228 regulator-always-on; 229 regulator-boot-on; 230 regulator-min-microvolt = <3300000>; 231 regulator-max-microvolt = <3300000>; 232 regulator-state-mem { 233 regulator-off-in-suspend; 234 }; 235 }; 236 237 vcc_5v0: SWITCH_REG1 { 238 regulator-name = "vcc_5v0"; 239 }; 240 241 vcc_3v3: SWITCH_REG2 { 242 regulator-name = "vcc_3v3"; 243 regulator-always-on; 244 regulator-boot-on; 245 }; 246 }; 247 }; 248}; 249 250&i2c2 { 251 status = "okay"; 252 clock-frequency = <400000>; 253 254 pcf8563: rtc@51 { 255 compatible = "nxp,pcf8563"; 256 reg = <0x51>; 257 #clock-cells = <0>; 258 interrupt-parent = <&gpio0>; 259 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 260 clock-output-names = "xin32k"; 261 }; 262}; 263 264&gmac { 265 assigned-clocks = <&cru CLK_GMAC_SRC_M1>, <&cru CLK_GMAC_SRC>, 266 <&cru CLK_GMAC_TX_RX>; 267 assigned-clock-parents = <&cru CLK_GMAC_RGMII_M1>, <&cru CLK_GMAC_SRC_M1>, 268 <&cru RMII_MODE_CLK>; 269 assigned-clock-rates = <0>, <50000000>; 270 clock_in_out = "output"; 271 phy-handle = <&phy>; 272 phy-mode = "rmii"; 273 phy-supply = <&vcc_3v3>; 274 pinctrl-names = "default"; 275 pinctrl-0 = <&rgmiim1_miim &rgmiim1_rxer &rgmiim1_bus2 &rgmiim1_mclkinout>; 276 status = "okay"; 277}; 278 279&mdio { 280 phy: ethernet-phy@0 { 281 compatible = "ethernet-phy-ieee802.3-c22"; 282 reg = <0x0>; 283 pinctrl-names = "default"; 284 pinctrl-0 = <ð_phy_rst>; 285 reset-active-low; 286 reset-assert-us = <50000>; 287 reset-deassert-us = <10000>; 288 reset-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; 289 }; 290}; 291 292&pinctrl { 293 ethernet { 294 eth_phy_rst: eth-phy-rst { 295 rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>; 296 }; 297 }; 298 bt { 299 bt_enable: bt-enable { 300 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 301 }; 302 303 bt_wake_dev: bt-wake-dev { 304 rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 305 }; 306 307 bt_wake_host: bt-wake-host { 308 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 309 }; 310 }; 311 312 pmic { 313 pmic_int_l: pmic-int-l { 314 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; 315 }; 316 }; 317 318 wifi { 319 wifi_enable_h: wifi-enable-h { 320 rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 321 }; 322 }; 323}; 324 325&pmu_io_domains { 326 pmuio0-supply = <&vcc1v8_pmu>; 327 pmuio1-supply = <&vcc3v3_sys>; 328 vccio1-supply = <&vcc_1v8>; 329 vccio2-supply = <&vccio_sd>; 330 vccio3-supply = <&vcc3v3_sd>; 331 vccio4-supply = <&vcc_dovdd>; 332 vccio5-supply = <&vcc_1v8>; 333 vccio6-supply = <&vcc_1v8>; 334 vccio7-supply = <&vcc_dovdd>; 335 status = "okay"; 336}; 337 338&saradc { 339 vref-supply = <&vcc_1v8>; 340 status = "okay"; 341}; 342 343&sdio { 344 bus-width = <4>; 345 cap-sd-highspeed; 346 cap-sdio-irq; 347 keep-power-in-suspend; 348 max-frequency = <50000000>; 349 mmc-pwrseq = <&sdio_pwrseq>; 350 non-removable; 351 pinctrl-names = "default"; 352 pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>; 353 rockchip,default-sample-phase = <90>; 354 sd-uhs-sdr50; 355 vmmc-supply = <&vcc3v3_sd>; 356 vqmmc-supply = <&vcc_1v8>; 357 status = "okay"; 358}; 359 360&sdmmc { 361 bus-width = <4>; 362 cap-mmc-highspeed; 363 cap-sd-highspeed; 364 card-detect-delay = <200>; 365 pinctrl-names = "default"; 366 pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>; 367 rockchip,default-sample-phase = <90>; 368 sd-uhs-sdr12; 369 sd-uhs-sdr25; 370 sd-uhs-sdr104; 371 vqmmc-supply = <&vccio_sd>; 372 status = "okay"; 373}; 374 375&uart0 { 376 pinctrl-names = "default"; 377 pinctrl-0 = <&uart0_xfer &uart0_ctsn &uart0_rtsn>; 378 uart-has-rtscts; 379 status = "okay"; 380 381 bluetooth { 382 compatible = "realtek,rtl8723ds-bt"; 383 device-wake-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; /* BT_WAKE */ 384 enable-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; /* BT_RST */ 385 host-wake-gpios = <&gpio1 RK_PC5 GPIO_ACTIVE_HIGH>; /* BT_WAKE_HOST */ 386 max-speed = <2000000>; 387 pinctrl-names = "default"; 388 pinctrl-0 = <&bt_enable>, <&bt_wake_dev>, <&bt_wake_host>; 389 }; 390}; 391 392&uart2 { 393 status = "okay"; 394}; 395 396&uart3 { 397 pinctrl-names = "default"; 398 pinctrl-0 = <&uart3m2_xfer>; 399 status = "okay"; 400}; 401 402&uart4 { 403 pinctrl-names = "default"; 404 pinctrl-0 = <&uart4m2_xfer>; 405 status = "okay"; 406}; 407